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DFI LANPARTY nF4 SLI-DR - 7/04-2BTA BigToe BIOS

 

AMD Athlon64 3200+ Venice

 

2x512MB GEIL ONE BH-5 (GOW1GB3200DC)

 

XFX Geforce 7800GTX PVT70FUNF7, 489/1314 78.03 drivers

 

Maxtor 160GB 8mb cache IDE hdd

 

ASUS CD-S520/A5 Black IDE CD-ROM Drive

 

OCZ PowerStream OCZ600ADJ ATX 600W Power Supply - Retail

 

 

 

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275x10_geilone_ddr180_bios-1.jpg

 

275x10_geilone_ddr180_bios-2.jpg

 

275x10_geilone_ddr180_bios-2b.jpg

 

*

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==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 275

LDT/FSB Frequency Ratio - AUTO

CPU/FSB Frequency Ratio - x 10.0

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.500v

 

CPU VID Control - 1.500v

CPU VID Special Control - Above VID * 110%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 3.40v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Enable

 

CAS Latency Control (Tcl) - 2.0

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 05 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 17 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - AUTO

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

DRAM Response Time - Fast

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://www.angrygames.com/ocdb/angry/nf4/g...ne_ddr180-1.jpg

 

 

3dMark2003:

 

275x10_geilone_ddr180-2.jpg

 

 

3dMark2005:

 

275x10_geilone_ddr180-3.jpg

 

 

Aquamark 3d:

 

275x10_geilone_ddr180-4.jpg

 

 

==========

 

 

 

short description:

275x10 @ 2750Mhz, 1.500v + 110%

2-2-5-2 @ 3.4v vdimm

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DFI LANPARTY nF4 SLI-DR - 7/04-2BTA BigToe BIOS

 

AMD Athlon64 3200+ Venice

 

2x512MB Centon Advance PC3200LL (TCCD)

 

XFX Geforce 7800GTX PVT70FUNF7, 489/1314 78.03 drivers

 

Maxtor 160GB 8mb cache IDE hdd

 

ASUS CD-S520/A5 Black IDE CD-ROM Drive

 

OCZ PowerStream OCZ600ADJ ATX 600W Power Supply - Retail

 

 

 

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*

 

 

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 275

LDT/FSB Frequency Ratio - AUTO

CPU/FSB Frequency Ratio - x 10.0

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.500v

 

CPU VID Control - 1.500v

CPU VID Special Control - Above VID * 110%

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 3.0v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:01/01

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 04 Bus Clocks

Row Cycle time (Trc) - 09 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 4708 Cycles

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 6.0 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://www.angrygames.com/ocdb/angry/nf4/c...10/275x10-1.jpg

 

 

3dMark2003:

 

275x10-2.jpg

 

 

3dMark2005:

 

275x10-3.jpg

 

 

Aquamark 3d:

 

275x10-4.jpg

 

 

==========

 

 

 

short description:

275x10 @ 2750Mhz, 1.500v + 110%

2.5-4-8-4 @ 3.0v vdimm

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DFI LANPARTY nF4 Ultra-D - 6/23-1 BIOS

 

AMD Athlon64 4200+ Manchester Dual Core

 

2x512MB OCZ PC4800 EE Platinum (Samsung tccd)

 

BFG 6800GTX 256MB, 78.01 drivers

 

Maxtor 200GB SATA hdd (8MB cache)

 

PLEXTOR Beige 16X DVD+R 8M Cache SATA DVD Burner - Retail

 

PC Power and Cooling Turbo-Cool® 510 SLI (510W) ATX-Deluxe Sleeved Power Supply (Native 24-pin )l

 

 

 

*

*

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 256

LDT/FSB Frequency Ratio - 4.0

CPU/FSB Frequency Ratio - 11.0

PCI eXpress Frequency - 101Mhz

 

CPU VID StartUp Value - Startup

 

CPU VID Control - 1.300v

CPU VID Special Control - Above VID * 123%

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 3.00v

 

DRAM Configuration Settings:

DRAM Frequency Set - 166=RAM/FSB:05/06

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.0

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 05 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 09 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 0780 Cycles

Write CAS Latency (Twcl) - 01 Bus Clocks

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Increase Skew

DQS Skew Value - 255

DRAM Drive Strength - Level 7

DRAM Data Drive Strength - Level 2

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 6.0 Nano Seconds

IdleCycle Limit - 128 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.30 :

 

http://www.angrygames.com/ocdb/edsmith/edsmith-1.jpg

 

 

 

3dMark2003:

 

edsmith-2.jpg

 

 

3dMark2005:

 

edsmith-3.jpg

 

 

Aquamark 3d:

 

edsmith-4.jpg

 

 

==========

 

Everest 2.01:

 

edsmith-5.jpg

 

 

 

 

short description:

256*11 @ 2816Mhz, 1.300v + 123%

2-2-5-2 @ 3.0v vdimm

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DFI LANPARTY nF4 Ultra-D - 623-3 Bios

 

AMD Athlon64X2 3800+ CCWBE 0529TPMW

 

2x1Gb Crucial Ballistix PC4000

 

BBA ATI Radeon X800XL, 428/1100 Omega 5.9 Cats

 

2X80G Hitachi Sata II Raid 0 and 1XMaxtor DM10 300G Sata

 

NEC DVD/RW Flashed to 2510A and Liteon DVD-Rom

 

OCZ PowerStream OCZ520ADJ ATX 520W Power Supply - Retail

 

 

 

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 270

LDT/FSB Frequency Ratio - X4.0

CPU/FSB Frequency Ratio - X10.0

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - Startup

 

CPU VID Control - 1.450v

CPU VID Special Control - Auto

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 2.70v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:1/01

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3.0

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 10 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 08 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - AUTO

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - AUTO

DRAM Data Drive Strength - AUTO

Max Async Latency - AUTO

DRAM Response Time - NORMAL

Read Preamble Time - AUTO

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16X

Bypass Max - 07X

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29:

 

270R121-11.jpg

 

 

3dMark2003:

 

270R121-21.jpg

 

 

3dMark2005:

 

270R121-31.jpg

 

 

Aquamark 3d:

 

270R121-41.jpg

 

Everest 2.2 RWL:

 

270R121EV2-2.jpg

 

 

==========

 

 

 

short description:

270x10 @ 2700Mhz, 1.450v Bios - 1.41 Per MBM

3-3-3-10 @ 2.7v vdimm

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DFI LANPARTY nF4 Ultra-D - 0510-2FIX BIOS

 

AMD Athlon64 3200+ Venice on Thermaltake Big Typhoon

 

2x512Mb Geil One S (tccd)

 

Connect3D X800GTO modded to 16 pipelines, 554/1000 Omega 2.6.75a drivers

 

Samsung 80Gb SATA hdd (8MB cache)

 

Fortron Blue Storm 500W

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 300

LDT/FSB Frequency Ratio - x3

CPU/FSB Frequency Ratio - x9

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - Startup

 

CPU VID Control - 1.550v

CPU VID Special Control - AUTO

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 2.70v

DRAM Add .03v - Enable

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:1/1

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 05 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 4708 Cycles

Write CAS Latency (Twcl) - 01

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 8

DRAM Data Drive Strength - Level 1

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 5.0 Nano Seconds

IdleCycle Limit - AUTO

Dynamic Counter - Enable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE (28423) + CPU-Z 1.31 + A64Tweaker:

 

http://img466.imageshack.us/my.php?image=8...ime3dm016ci.jpg

 

 

3dMark2003 (13191) + Everest 1.51 Memory Read (6376):

 

http://img466.imageshack.us/my.php?image=3...restread4gc.jpg

 

 

3dMark2005 (6363) + Everest 1.51 Memory Write (2951):

 

http://img458.imageshack.us/my.php?image=3...estwrite9gk.jpg

 

 

Aquamark 3d (85208):

 

http://img458.imageshack.us/my.php?image=aquamark5qi.jpg

 

 

==========

 

 

 

short description:

300x9 @ 2700MHz, 1.550v

2x512 @ 300MHz @ 2.5-3-3-5 @ 2.73v

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DFI LANPARTY nF4 SLI-DR - 7/04-2BTA BigToe BIOS

 

AMD Athlon64 X2 4400+ Dual Core

 

2x1024MB Corsair CMX1024-3500LLPRO (XMS3502v1.2):

cmx1024-3500LL_Pro.jpg

 

Engineering Sample Geforce 6800GT, 78.03 drivers

 

Western Digital 36GB 8mb cache 10,000RPM "Raptor" hdd

 

NEC 3540A Black IDE DVD-RW Drive

 

OCZ PowerStream OCZ600ADJ ATX 600W Power Supply - Retail

 

 

 

*

*

LL-Pro_250x11_x2_bios-1.jpg

 

LL-Pro_250x11_x2_bios-2.jpg

 

LL-Pro_250x11_x2_bios-3.jpg

 

 

*

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==========

 


[b]Genie BIOS Settings:[/b]

[color=red]

FSB Bus Frequency.............................  -  250

LDT/FSB Frequency Ratio.......................  -  AUTO

CPU/FSB Frequency Ratio.......................  -  Auto

PCI eXpress Frequency.........................  -  100Mhz



CPU VID StartUp Value.........................  -  1.500v



CPU VID Control...............................  -  1.400v

CPU VID Special Control.......................  -  Above VID * 113%

LDT Voltage Control...........................  -  1.30v 

Chip Set Voltage Control......................  -  1.60v

DRAM Voltage Control..........................  -  [b]2.60v[/b][/color]



[b]DRAM Configuration Settings:[/b]

[color=red]

DRAM Frequency Set............................  -  200=RAM/FSB:01/01

Command Per Clock (CPC).......................  -  Enable

CAS Latency Control (Tcl).....................  -  3.0

RAS# to CAS# delay (Trcd).....................  -  03 Bus Clocks

Min RAS# active time (Tras)...................  -  08 Bus Clocks

Row precharge time (Trp)......................  -  02 Bus Clocks

Row Cycle time (Trc)..........................  -  12 Bus Clocks

Row refresh cyc time (Trfc)...................  -  24 Bus Clocks

Row to Row delay (Trrd).......................  -  03 Bus Clocks

Write recovery time (Twr).....................  -  03 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  3120 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

DRAM Drive Strength...........................  -  Auto

DRAM Data Drive Strength......................  -  Auto

Max Async Latency.............................  -  Auto

DRAM Response Time............................  -  Normal

Read Preamble Time............................  -  Auto

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  04 x

32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://www.angrygames.com/ocdb/angry/nf4/x...250x11_x2-1.jpg

 

 

3dMark2003:

 

LL-Pro_250x11_x2-2.jpg

 

 

3dMark2005:

 

LL-Pro_250x11_x2-3.jpg

 

 

Aquamark 3d:

 

LL-Pro_250x11_x2-4.jpg

 

 

==========

 

 

 

short description:

250x11 @ 2750Mhz, 1.400v + 113%

3.0-3-8-2 @ 2.6v vdimm

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DFI LANPARTY nF4 SLI-DR - 7/04-2BTA BigToe BIOS

 

AMD Athlon64 X2 4400+ Dual Core

 

2x1024MB OCZ PC4000EB (OCZ5002048EBPE-K)

 

Engineering Sample Geforce 6800GT, 78.03 drivers

 

Western Digital 36GB 8mb cache 10,000RPM "Raptor" hdd

 

NEC 3540A Black IDE DVD-RW Drive

 

OCZ PowerStream OCZ600ADJ ATX 600W Power Supply - Retail

 

 

 

*

*

x2_265x10_3-3-2-7_bios-1.jpg

 

x2_265x10_3-3-2-7_bios-2.jpg

 

x2_265x10_3-3-2-7_bios-3.jpg

 

 

*

*

 

==========

 


[b]Genie BIOS Settings:[/b]

[color=red]

FSB Bus Frequency.............................  -  265

LDT/FSB Frequency Ratio.......................  -  AUTO

CPU/FSB Frequency Ratio.......................  -  x 10.0

PCI eXpress Frequency.........................  -  100Mhz



CPU VID StartUp Value.........................  -  1.550v



CPU VID Control...............................  -  1.400v

CPU VID Special Control.......................  -  Above VID * 113%

LDT Voltage Control...........................  -  1.30v 

Chip Set Voltage Control......................  -  1.60v

DRAM Voltage Control..........................  -  [b]2.80v[/b][/color]



[b]DRAM Configuration Settings:[/b]

[color=red]

DRAM Frequency Set............................  -  200=RAM/FSB:01/01

Command Per Clock (CPC).......................  -  Enable

CAS Latency Control (Tcl).....................  -  3.0

RAS# to CAS# delay (Trcd).....................  -  03 Bus Clocks

Min RAS# active time (Tras)...................  -  07 Bus Clocks

Row precharge time (Trp)......................  -  02 Bus Clocks

Row Cycle time (Trc)..........................  -  07 Bus Clocks

Row refresh cyc time (Trfc)...................  -  14 Bus Clocks

Row to Row delay (Trrd).......................  -  02 Bus Clocks

Write recovery time (Twr).....................  -  02 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  4708 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

DRAM Drive Strength...........................  -  Level 7

DRAM Data Drive Strength......................  -  Level 2

Max Async Latency.............................  -  Auto

DRAM Response Time............................  -  Normal

Read Preamble Time............................  -  Auto

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  07 x

32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://www.angrygames.com/ocdb/angry/nf4/x..._3-3-2-7_01.jpg

 

 

3dMark2003:

 

x2_265x10_3-3-2-7_02.jpg

 

 

3dMark2005:

 

x2_265x10_3-3-2-7_03.jpg

 

 

Aquamark 3d:

 

x2_265x10_3-3-2-7_04.jpg

 

 

==========

 

 

 

short description:

265x10 @ 2650Mhz, 1.400v + 113%

3.0-3-7-2 @ 2.80v vdimm

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DFI LANPARTY nF4 Ultra-D 5/10/2 Fixed

 

AMD Athlon 64 4000+ San Diego Socket 939 Processor CABHE 0505 FPMW stepping

 

2x256MB Mushkin Level 2 PC3500 BH5

 

Asus EAX850XTPE Cat 5.8 drivers - 590/590

 

2x Western Digital Raptor WD360GD 36.7GB 10,000 RPM Serial ATA150 Hard Drive (RAID-0)

 

OCZ Modstream 520w 24-pin ATX power supply

 

Mach II Standard

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 263

LDT/FSB Frequency Ration - 4

CPU/FSB Frequency Ratio - 12

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.40v

 

CPU VID Control - 1.5v

CPU VID Special Control - Avove VID * 113%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 3.50v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200 (DRAM/FSB:1/01)

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.0

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 05 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 12 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 4196 Cycles

Write CAS Latency (Twcl) - 01

DRAM Bank Interleave - Enabled

 

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 8

DRAM Data Drive Strength - Auto

Max Async Latency - 07.0

DRAM Response - Normal

Read Preamble Time - 05.0

IdleCycle Limit - 000 Cycles

Dynamic Counter - Enabled

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.30:

 

http://img.photobucket.com/albums/v636/loc...2000OCDBA64.jpg

 

 

3dMark2003:

 

03score.jpg

 

 

3dMark2005:

 

05score.jpg

 

 

Aquamark:

 

Aqua03.jpg

 

 

Everest read:

 

Evsmall.jpg

 

==========

 

 

short description:

Week 05 4000+ & 2x256 BH5

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DFI Lanparty nF4 Ultra D (modded to SLI) 6/23-3 Bios

 

Venice 3200+ Venice Stepping=LBBLE 0529DPGW

 

Thermalright XP90 with Panaflo 92mm fan

 

2x512MB OCZ El Platinum Rev 2 PC3200 (r. 1.0, TCCD)

 

eVGA Nvidia Geforce 7800 GT

 

Hitachi Deskstar T7K250 160GB Serial ATAII 7200RPM

 

NEC 3540 DVD-RW

 

OCZ Powerstream 520W

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 270

LDT/FSB Frequency Ratio - Auto

CPU/FSB Frequency Ratio - x 10.0

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - StartUp

 

CPU VID Control - 1.300v

CPU VID Special Control - Above VID * 123%

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:01/01

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 07 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 4708 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 7

DRAM Data Drive Strength - Level 2

Max Async Latency - 0.70 Nano Seconds

DRAM Response Time - Normal

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

 

Prime95 + 3dMark2001SE + 2x CPU-Z + MBM + Everest :

 

http://img423.imageshack.us/my.php?image=stability7jk.jpg

 

 

3dMark2003 : (16,014)

 

http://img423.imageshack.us/my.php?image=3dmark035sx.jpg

 

 

3dMark2005 : (7408)

 

http://img423.imageshack.us/my.php?image=3dmark055yk.jpg

 

 

Aquamark 3d : (88,230)

 

http://img423.imageshack.us/my.php?image=aquamark34kc.jpg

 

 

short description:

270x10 @ 2700Mhz, 1.300v + 123%

2.5-4-7-3 @ 2.8v vdimm

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DFI LANPARTY nF4 Ultra-D - 704-2BTA BIOS

AMD Athlon64 3200+ Venice LBBLE 0516EPMW

2x512MB OCZ PC4000 Gold VX (BH5/UTT)

ATI Radeon X800 XL 256MB (BBA), 450/1094

Maxtor DiamondMax 10 300GB SATA 16MB buffer

NEC ND-3520A DVD-RW DL

OCZ ModStream 520W, 3.3v rail modded

 

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 266

LDT/FSB Frequency Ratio - 3.0

CPU/FSB Frequency Ratio - 10.0

PCI eXpress Frequency - 110Mhz

 

CPU VID StartUp Value - StartUp

 

CPU VID Control - 1.525v

CPU VID Special Control - Above VID * 113%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 3.30v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 1.5

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 06 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 15 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - normal4

Max Async Latency - 10.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 7.0 Nano Seconds

IdleCycle Limit - 016 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 04 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE (28309) + CPU-Z:

 

cpuz3dm01p959ut.th.png

 

 

3dMark2003 (12599):

 

3dmark030sp.png

 

 

3dMark2005 (5784):

 

3dmark059oy.png

 

 

Aquamark 3d (79740):

 

aquamark1tb.png

 

 

Everest 1.51 (5715):

 

everest1518re.png

 

 

Everest 2.20 (6864):

 

everest2209dx.png

 

 

==========

 

 

short description:

 

Venice 3200+ @ 2660Mhz (266x10), 1.72v (1.525 + 113%, 3.3v rail modded, NOT on the 4v)

BH5/UTT 1.5-2-2-6 @ 3.3v vdimm

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DFI LANPARTY nF4 SLI-DR - 7/04-2BTA BigToe BIOS

 

AMD Athlon64 3500+ Clawhammer (CAAXC) 512k L2

 

2x1024MB OCZ PC4000EB (OCZ5002048EBPE-K)

 

2x Chaintech 6600GT SLI, 575/1150 82.84 drivers

 

160GB Maxtor IDE

 

NEC 3540A Black IDE DVD-RW Drive

 

Seasonic S12-600 (revA2) ATX 600W Power Supply - Retail

 

 

 

*

*

 

bios_225x11_4000EB-1.jpg

 

bios_225x11_4000EB-2.jpg

 

bios_225x11_4000EB-3.jpg

 

*

*

 

==========

 


[b]Genie BIOS Settings:[/b]

[color=red]

FSB Bus Frequency.............................  -  225

LDT/FSB Frequency Ratio.......................  -  AUTO

CPU/FSB Frequency Ratio.......................  -  x 11.0

PCI eXpress Frequency.........................  -  100Mhz



CPU VID StartUp Value.........................  -  1.500v



CPU VID Control...............................  -  1.450v

CPU VID Special Control.......................  -  Above VID * 113%

LDT Voltage Control...........................  -  1.30v 

Chip Set Voltage Control......................  -  1.60v

DRAM Voltage Control..........................  -  2.8v[/color]



[b]DRAM Configuration Settings:[/b]

[color=red]

DRAM Frequency Set............................  -  200=RAM/FSB:01/01

Command Per Clock (CPC).......................  -  Enable

CAS Latency Control (Tcl).....................  -  3.0

RAS# to CAS# delay (Trcd).....................  -  03 Bus Clocks

Min RAS# active time (Tras)...................  -  08 Bus Clocks

Row precharge time (Trp)......................  -  02 Bus Clocks

Row Cycle time (Trc)..........................  -  12 Bus Clocks

Row refresh cyc time (Trfc)...................  -  24 Bus Clocks

Row to Row delay (Trrd).......................  -  03 Bus Clocks

Write recovery time (Twr).....................  -  03 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  4708 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

DRAM Drive Strength...........................  -  Auto

DRAM Data Drive Strength......................  -  Auto

Max Async Latency.............................  -  Auto

DRAM Response Time............................  -  Normal

Read Preamble Time............................  -  Auto

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  04 x

32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://www.angrygames.com/ocdb/justin/225x11_4000EB-1.jpg

 

 

3dMark2003:

 

225x11_4000EB-2.jpg

 

 

3dMark2005:

 

225x11_4000EB-3.jpg

 

 

Aquamark 3d:

 

225x11_4000EB-4.jpg

 

 

==========

 

 

 

short description:

225x11 @ 2475Mhz, 1.450v + 113%

3.0-3-8-2 @ 2.8v vdimm

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DFI LANPARTY nF4 Ultra-D - 6/23/05 BIOS

 

AMD Athlon x2 3800+ Manchester

 

4x512 Patriot PDC1GPc3200+XBLK (TCCD)

 

x800 pro 256, 530/1152 ATI catalyst 5.6 Drivers

 

Western Digital Raptor 74GB (8MB cache) 10,000 RPM x 2 (RAID 0)

 

PLEXTOR PX-712A DL DVD-RW

 

OCZ PowerStream OCZ600ADJ ATX 600W Power Supply - Retail

 

Cooling

 

Swiftech MCP350 3/8in. Water Pump

 

Swiftech MCW6000-64

 

Swiftech MCW50

 

Double Heater Core w/ shoud

 

BIOS Information

 

Genie BIOS Settings:

FSB Bus Frequency - 280

LDT/FSB Frequency Ratio - AUTO

CPU/FSB Frequency Ratio - AUTO

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.500v

 

CPU VID Control - 1.450v

CPU VID Special Control - Above VID * 110%

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 3.00v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Disable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 07 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 10 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 7

DRAM Data Drive Strength - Level 2

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 5.5 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

==========

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://www.e-w-t.net/images/4ocdb.jpg

 

3dMark2003:

 

3dmark03.jpg

 

 

3dMark2005:

 

3dmark05.jpg

 

Aquamark 3d:

 

aquamark.jpg

 

==========

 

short description:

280x10@ 2800Mhz, 1.450v + 110%

2.5-4-7-3 @ 3.0v vdimm

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