Jump to content
Sign in to follow this  
Angry_Games

Socket 939 Overclocking Database

Recommended Posts

DFI LANPARTY nF4 Expert SLI-DR - 11/11/2005 BIOS

 

AMD Opteron 175 Dual Core 2 x 1MB L2 Cache (CCBWE 0530TPMW)

 

2 x 512MB G.Skill F1-4800DSU2-1GBFF (TCCD)

 

XFX GeForce 7800GT, 498/1140 81.87 drivers

 

2 x Western Digital "Raptor" 36GB 10,000RPM SATA (RAID-0)

 

1 x Maxtor Diamondax10 300 GB, 16MB Cache

 

Plextor 708a DVD/CD Drive

 

OCZ 520w Powerstream (non-SLI version)

Genie BIOS Settings:



[COLOR=Red]FSB Bus Frequency.............................  -  297

LDT/FSB Frequency Ratio.......................  -  x 3

CPU/FSB Frequency Ratio.......................  -  x 10.0

PCI eXpress Frequency.........................  -  100Mhz



CPU VID StartUp Value.........................  -  Startup



CPU VID Control...............................  -  1.550v

CPU VID Special Control.......................  -  Above VID * 102.4%

LDT Voltage Control...........................  -  1.40v 

Chip Set Voltage Control......................  -  1.78v

DRAM Voltage Control..........................  -  2.84v[/COLOR]



DRAM Configuration Settings:

[COLOR=Red]

DRAM Frequency Set............................  -  200=RAM/FSB:01/01

Command Per Clock (CPC).......................  -  Disable 

CAS Latency Control (Tcl).....................  -  2.5

RAS# to CAS# delay (Trcd).....................  -  04 Bus Clocks

Min RAS# active time (Tras)...................  -  07 Bus Clocks

Row precharge time (Trp)......................  -  03 Bus Clocks

Row Cycle time (Trc)..........................  -  10 Bus Clocks

Row refresh cyc time (Trfc)...................  -  13 Bus Clocks

Row to Row delay (Trrd).......................  -  02 Bus Clocks

Write recovery time (Twr).....................  -  02 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  02 Bus Clocks

Refresh Period (Tref).........................  -  3120 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

DRAM Drive Strength...........................  -  Level 11

DRAM Data Drive Strength......................  -  Level 1(Reduce 50%)

Max Async Latency.............................  -  Auto

DRAM Response Time............................  -  Fast

Read Preamble Time............................  -  Auto

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  07 x

32 Byte Granularity...........................  -  Disable(4 Bursts)[/COLOR]

 

Prime95, 3dMark01, CPU-Z 1.31, Everest Read:

 

2970ocdb14ch.png

 

 

3DMark03, Sandra, Everest Write:

 

2970ocdb24ix.png

 

 

3DMark05, A64 Tweaker, Everest Latency:

 

2970ocdb33cb.png

 

Aquamark:

 

2970ocdb40dy.png

 

 

 

Short Description:

297x10 = 2970Mhz @ 1.55v*102.4%

2x512 2.5-4-3-7 2T @ 2.82v

Share this post


Link to post
Share on other sites

DFI LANPARTY nF4 Ultra-D - 7/04-2 BigToe BIOS

 

AMD Athlon64 3700 San Diego

 

2x512MB OCZ PC3700 Gold Revision3 (HYNIX DT-D5)

 

ChainTech 7800GT 256MB, 435/1100 81.85 drivers

 

WD Raptor 74X2 Raid 0 16k Stripe

 

LiteOn DVDRW

 

LiteOn CDRW

 

OCZ PowerStream OCZ520ADJ ATX 520W Power Supply - Retail

 

==========

 

Genie BIOS Settings:

FSB Bus Frequency - 275

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 10

PCI eXpress Frequency - 102Mhz

 

CPU VID StartUp Value - 1.425v

 

CPU VID Control - 1.375v

CPU VID Special Control - Above VID * 113%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 2.90v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 08 Bus Clocks

Row refresh cyc time (Trfc) - 15 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Increase

DQS Skew Value - 50

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Level 2

Max Async Latency - 7.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 5.0 Nano Seconds

IdleCycle Limit - 016 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

==========

 

Prime95 + 3dMark2001 + CPU-Z 1.29 + Everest 1.51 Read:

 

dfibenchmark2275x101839kb.th.jpg

 

 

3dMark2003:

3dmark03275x101838xd.th.jpg

 

 

3dMark2005:

3dmark05275x101834ak.th.jpg

 

 

Aquamark 3d

aquamark275x101835av.th.jpg

 

 

==========

 

short description:

275X10 @ 2750Mhz, 1.3750v + 113%

2.5-3-8-3 @ 2.9v vdimm

Share this post


Link to post
Share on other sites

DFI Ultra-D - 11/14/2005 Beta Bios

 

4000 Sandiego 0515

 

2x1024mb Crucial Ballistix Z503

 

Power Color x850xt @ 580621 with Cat 5.9

 

1x 20gig Western Digital IDE drive

 

ASUS IDE CD-ROM Drive

 

OCZ 600w Power Stream SLI Edition

 

Thermalright SLK948U with 92mm Panaflo

 

*

*

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 275

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 10.0

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.50v

 

CPU VID Control - 1.425v

CPU VID Special Control - Above VID * 113%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 2.60v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:01/01

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 09 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - Auto

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

DRAM Response Time - Normal

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Enable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

 

==========

 

 

Prime95 + 3dMark2001SE + 2xCPU-Z + MBM :

 

http://img332.imageshack.us/img332/1297/test17dm.jpg

 

 

3dMark2003 + Everest :

 

test28pa.jpg

 

 

3dMark2005 :

 

test30by.jpg

 

 

Aquamark 3d:

 

test47fm.jpg

 

 

==========

 

 

 

short description:

275x10=2750mhz

3-3-8-3-9-16 2.6vdimm

Share this post


Link to post
Share on other sites

DFI SLI-DR EXPERT Mother board with Beta Bios 11/25/05.

 

OSA146BNBOX processor. CABYE 0540.

 

XfX 7800GTX Video Card with 81.87 Drivers.

 

PCPower&Cooling 510SLI power supply.

 

OCZ6001024ELCDPE-K PC4800 2x512. Orange Slots.

 

2x37.4gig Raptors in Raid 0 NVraidRom "Booting".

 

1x Maxtor 200gig PATA 133.

 

1x Maxtor 15gig PATA 100.

 

1x Lite-On Dual Layer DVD/RW.

 

1x Mitsumi 1.44 Floppy drive.

 

Thermalright XP-90 W/Delta 3 blade 4K RPM 78.4 CFM (on power supply lead).

 

Nvidia 6.66 Driver set using Nvidia Ethernet and onboard sound.

 

Genie BIOS Settings:

[color=red]

FSB Bus Frequency.............................  -  300

LDT/FSB Frequency Ratio.......................  -  x 3.0

CPU/FSB Frequency Ratio.......................  -  x10

PCI eXpress Frequency.........................  -  102Mhz



CPU VID StartUp Value.........................  -  1.500v



CPU VID Control...............................  -  1.400v

CPU VID Special Control.......................  -  Above VID * 114.2%

LDT Voltage Control...........................  -  1.30v 

Chip Set Voltage Control......................  -  1.68v

DRAM Voltage Control..........................  -  2.80v [/color]



DRAM Configuration Settings:

[color=blue]

DRAM Frequency Set............................  -  200=RAM/FSB:01/01

Command Per Clock (CPC).......................  -  Enable 

CAS Latency Control (Tcl).....................  -  2.5

RAS# to CAS# delay (Trcd).....................  -  4.0

Min RAS# active time (Tras)...................  -  10.0

Row precharge time (Trp)......................  -  4.0

Row Cycle time (Trc)..........................  -  10 Bus Clocks

Row refresh cyc time (Trfc)...................  -  14 Bus Clocks

Row to Row delay (Trrd).......................  -  03 Bus Clocks

Write recovery time (Twr).....................  -  03 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  3120 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

RAM DLL SPEED.................................  -  High Speed 

DRAM Drive Strength...........................  -  Level 5

DRAM Data Drive Strength......................  -  Level 2

Max Async Latency.............................  -  10.0ns

DRAM Response Time............................  -  Fast

Read Preamble Time............................  -  6.5ns

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  08 x

Bypass Max....................................  -  04 x

32 Byte Granularity...........................  -  Disable(4 Bursts)[/color]

 

Prime and 3D01.

allben-3d01.jpg

 

3D03 and 3D05 Benches.

03d03-05.jpg

 

Mini-facts:

146 processor at 300x10 =3000Mhz with 2x512 OCZ TCCD and XfX 7800GTX

Using the DFI SLI-DR EXPERT Motherboard.

 

RGone...

Share this post


Link to post
Share on other sites

DFI LANPARTY UT nF4 sLI-DR - 7/02-3 BETA BIOS

 

AMD Athlon64 X2 4400+ TOLEDO ADA4400DAA6CD/CCBWE 0532UPMW "IHS REMOVED"

 

2x512MB OCZ5331024ELDCPE OCZ PC4200 PLATINUM REV 1.0(TCCD) MEMTEST STABLE TO 335 2T 2.5-4-10-4

 

2X EVGA 7800GT 256MB, 498/1150 81.95 drivers

 

Maxtor 200GB IDE hdd (16MB cache)

 

LITE ON Black IDE DVD-ROM Drive

 

ENERMAX All in One Noisetaker Series EG701AX-VE SFMA(24P) ATX12V 600W Power Supply - Retail

 

CUSTOM DANGER DEN WATER COOLING 30C IDLE 40C LOAD

 

*

*

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 275

LDT/FSB Frequency Ratio - 3.0

CPU/FSB Frequency Ratio - 10.0

PCI eXpress Frequency - 101Mhz

 

CPU VID StartUp Value - 1.550v

 

CPU VID Control - 1.375

CPU VID Special Control - Above VID * 126%

LDT Voltage Control - 1.40v

Chip Set Voltage Control - 1.70v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 06 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 14 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 04 Bus Clocks

Refresh Period (Tref) - 0648 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - NORMAL

Read Preamble Time - 6.0 Nano Seconds

IdleCycle Limit - 16 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 8 x

Bypass Max - 04 x

32 Byte Granularity - Auto

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.31 + Everest Ultamate:

 

neoshooter215gj.th.png

 

3dMark2003:

 

neoshooter231hl.th.png

 

 

3dMark2005:

 

neoshooter224fh.th.png

 

 

Aquamark 3d:

 

neoshooter243lm.th.png

 

 

==========

 

 

 

short description:

275x10 @ 2750Mhz, 1.375v + 126%

2.5-3-6-3 @ 2.8v vdimm

Share this post


Link to post
Share on other sites

DFI LANPARTY nF4 D - 7/04-2 BigToe BIOS

 

AMD Athlon64 3000+ Venice

 

2 x 512MB Patriot Signiture Line (UTT)

 

Xpertvision [email protected]/1200 128MB DDR3 (not GT)

 

Hitachi 80GB Sata hdd (8MB cache)

 

Acbel I-Power 400W Power Supply (3.3v rail mod)

 

 

Genie BIOS Settings:

FSB Bus Frequency - 300

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 9

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - StartUp

 

CPU VID Control - 1.500v

CPU VID Special Control - Above VID * 113%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 3.40v (Bios show 3.36v)

 

DRAM Configuration Settings:

DRAM Frequency Set - 166

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 05 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 6.0 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

untitled.jpg

 

 

3dMark2003:

 

1.jpg

 

 

3dMark2005:

 

2.jpg

 

 

short description:

300x9 @ 2700Mhz, 1.500v + 113%

2-2-5-2 @ 3.4v vdimm (Bios show 3.36v)

Share this post


Link to post
Share on other sites

DFI LANPARTY nF4 UT SLI-DR - BIOS 704-2bt

 

AMD Athlon64 X2 4800+ Toledo (JH-E6 ~ CCBWE)

 

2x1024 OCZ Platinum rev.1 (Infineon)

 

MSI 7800GTX 256MB (513/1330)

 

4x WD Raptor SATA150 RAID 0

 

PC Power & Cooling TurboCool 510-SLI

 

Sony DRU 710a 16x Dual Layer DVD+/- RW ATA66 Primary / Master

 

 

===============

 

 

Genie BIOS Settings:

FSB Bus Frequency - 217

LDT/FSB Frequency Ratio - 5

CPU/FSB Frequency Ratio - 12

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - Auto

 

CPU VID Control - 1.450v

CPU VID Special Control - Above VID * 0%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 2.7v

+.03v Enabled

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:1/01

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.0

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 07 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

DRAM Response Time - Normal

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 04 x

32 Byte Granularity - Disable(4 Bursts)

 

 

===============

 

 

Prime95x2 + 3dMark2001SE + CPU-Z 1.30 + Everest 2.20.405

 

 

3dMark2003

 

 

3dMark2005

 

 

Aquamark 3D

 

 

===============

 

 

short description:

Toledo 217x12 2605MHz @ 1.45v

2GB OCZ Plat. 2-3-2-7, 1T, 2.73v

Share this post


Link to post
Share on other sites

DFI LANPARTY nF4 Ultra-D - 7/04-2 BigToe BIOS

 

AMD Athlon64 X2 4400+ Toledo

 

2x1024MB Mushkin XP4000 PC4000

 

ATI All-In-Wonder Radeon X600Pro 256MB DDR PCI Express x16, Catalyst 5.12 X64 Drivers

 

WD Raptor WD360GD 36.7GB 10,000 RPM SATA

WD 200G SATA

Maxtor MaxlineIII 300G SATA 16MB

 

Lite-On LTC-4816H Combo Drive

Pioneer DVR-107D

 

ENERMAX Whisper II EG565P-VE FMA(24P) ATX12V 535W Power Supply

 

*

*

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 260

LDT/FSB Frequency Ratio - 4X

CPU/FSB Frequency Ratio - 11X

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.400v

 

CPU VID Control - 1.300v

CPU VID Special Control - Above VID * 113%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:01/01

Command Per Clock (CPC) - AUTO

CAS Latency Control (Tcl) - 3.0

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - AUTO

Write CAS Latency (Twcl) - 1 clk

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - normal4

DRAM Data Drive Strength - Level 3

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Normal

Read Preamble Time - 5.0 Nano Seconds

IdleCycle Limit - 16 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.30 + Everest 2.20 Home:

 

440011ze.th.jpg

 

 

3dMark2003:

 

440024vd.jpg

 

 

3dMark2005:

 

440035xd.jpg

 

 

Sandra 2005 SR2 + SuperPI 2M:

 

440045wz.th.jpg

 

 

==========

 

 

 

short description:

260x11 @ 2866Mhz, 1.300v + 113%

3.0-4-8-3 @ 2.8v vdimm

Share this post


Link to post
Share on other sites

Customer board for test. Ultra-D w/SLI mod...

 

Bios Version 6.23.

 

3500+ Winchester.

 

XFX 7800GTX 256 W/ 81.95 Drivers.

 

PCPower&Cooling 510SLI power supply.

 

OCZ PC3200 OCZ4001024WV3DC-K 2x512 from customer.

 

2x36.4Raptors Raid 0.

 

1x Maxtor 200gig PATA133.

 

1x Lite-On Dual Layer DVD/RW.

 

1x Mitsumi Floppy Drive.

 

OEM 754 Cpu stock HSF combo.

 

Nvidia 6.66 Driver set using Nvidia Ethernet and Onboard Sound.

 

Genie BIOS Settings:



[color=red]FSB Bus Frequency.............................  -  235

LDT/FSB Frequency Ratio.......................  -  x 4.0

CPU/FSB Frequency Ratio.......................  -  x10

PCI eXpress Frequency.........................  -  102Mhz



CPU VID StartUp Value.........................  -  1.425v



CPU VID Control...............................  -  1.350v

CPU VID Special Control.......................  -  Above VID * 113.0%

LDT Voltage Control...........................  -  1.30v 

Chip Set Voltage Control......................  -  1.60v

DRAM Voltage Control..........................  -  2.80v[/color]



DRAM Configuration Settings:



[color=blue]DRAM Frequency Set............................  -  200=RAM/FSB:01/01

Command Per Clock (CPC).......................  -  Enable 

CAS Latency Control (Tcl).....................  -  2.0

RAS# to CAS# delay (Trcd).....................  -  3.0

Min RAS# active time (Tras)...................  -  8.0

Row precharge time (Trp)......................  -  2.0

Row Cycle time (Trc)..........................  -  12 Bus Clocks

Row refresh cyc time (Trfc)...................  -  24 Bus Clocks

Row to Row delay (Trrd).......................  -  04 Bus Clocks

Write recovery time (Twr).....................  -  03 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  3120 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

RAM DLL SPEED.....NOT IN THIS BIOS............  -  High Speed 

DRAM Drive Strength...........................  -  Level 8/Normal 4

DRAM Data Drive Strength......................  -  Level 2

Max Async Latency.............................  -  8.0ns

DRAM Response Time............................  -  Fast

Read Preamble Time............................  -  6.0ns

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  08 x

Bypass Max....................................  -  04 x

32 Byte Granularity...........................  -  Disable(4 Bursts)[/color]

 

Prime95 and 3D01.

24hrP95-2350mhz3500Win.jpg

 

3D03 and 3D05 Benches.

 

3d03-05-24hrP95-2350mhz3500Win.jpg

 

Mini-facts.

Customer Ultra-D board passing testing with flying colors at 235X10 Winnie 3500+.

 

RGone...

Share this post


Link to post
Share on other sites

Customer board for test. Ultra-D w/SLI mod...

 

Bios Version 6.23.

 

3000+ Winchester from customer.

 

2xPX6600GT Gainward in SLI mode W/ 81.95 Drivers.

 

PCPower&Cooling 510SLI power supply.

 

OCZ PC3200 OCZ4001024WV3DC-K 2x512 from customer.

 

2x36.4Raptors Raid 0.

 

1x Maxtor 200gig PATA133.

 

1x Lite-On Dual Layer DVD/RW.

 

1x Mitsumi Floppy Drive.

 

OEM 754 Cpu stock HSF combo.

 

Nvidia 6.66 Driver set using Nvidia Ethernet and Onboard Sound.

 

[b]Genie BIOS Settings:[/b]



[color=red]FSB Bus Frequency.............................  -  270

LDT/FSB Frequency Ratio.......................  -  x 3.0

CPU/FSB Frequency Ratio.......................  -  x9

PCI eXpress Frequency.........................  -  102Mhz



CPU VID StartUp Value.........................  -  1.425v



CPU VID Control...............................  -  1.350v

CPU VID Special Control.......................  -  Above VID * 113.0%

LDT Voltage Control...........................  -  1.30v 

Chip Set Voltage Control......................  -  1.60v

DRAM Voltage Control..........................  -  3.10v[/color]



[b]DRAM Configuration Settings:[/b]



[color=blue]DRAM Frequency Set............................  -  180=RAM/FSB:09/10

Command Per Clock (CPC).......................  -  Enable 

CAS Latency Control (Tcl).....................  -  2.0

RAS# to CAS# delay (Trcd).....................  -  3.0

Min RAS# active time (Tras)...................  -  8.0

Row precharge time (Trp)......................  -  2.0

Row Cycle time (Trc)..........................  -  12 Bus Clocks

Row refresh cyc time (Trfc)...................  -  24 Bus Clocks

Row to Row delay (Trrd).......................  -  04 Bus Clocks

Write recovery time (Twr).....................  -  03 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  3120 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

RAM DLL SPEED......NOT USED THIS BIOS.........  -  High Speed 

DRAM Drive Strength...........................  -  Level 8/Normal 4

DRAM Data Drive Strength......................  -  Level 2

Max Async Latency.............................  -  8.0ns

DRAM Response Time............................  -  Fast

Read Preamble Time............................  -  6.0ns

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  08 x

Bypass Max....................................  -  04 x

32 Byte Granularity...........................  -  Disable(4 Bursts)[/color]

 

Prime and 3D01 bench:

 

all-jc-270x9-180mem.jpg

 

3D03 and 3D05 benches:

 

3d03-05-jc-270x9-180mem.jpg

 

Mini-factoid:

JoeC. Ultra-D board tested with customer memory and cpu for results pending

return to user. 270x9 w/memory on 180. Thanks JoeC.

 

RGone...

Share this post


Link to post
Share on other sites

DFI LANPARTY nF4 SLI-DR (7/04-2BTA BIOS)

 

AMD Athlon64 3200+ 939 cpu (Venice core)

 

2x512MB GEIL Ultra-X PC4400 TCCD (GLX1GB4400DC)

 

Nvidia GeForce 6800GT engineering Sample, 385/1095 81.89 drivers

 

Western Digital Raptor 36GB 10,000RPM SATA hdd

 

Asus 52x Quiet-Trak CD-ROM

 

Skyhawk 520w 24-pin ATX power supply

 

 

 

*

*

 

bios_geil4400_275x10-1.gif

 

bios_geil4400_275x10-2.gif

 

bios_geil4400_275x10-3.gif

 

 

*

*

 

==========

 

[b]Genie BIOS Settings:[/b]

[color=red]

FSB Bus Frequency.............................  -  275

LDT/FSB Frequency Ratio.......................  -  Auto

CPU/FSB Frequency Ratio.......................  -  Auto

PCI eXpress Frequency.........................  -  100Mhz



CPU VID StartUp Value.........................  -  1.500v



CPU VID Control...............................  -  1.500v

CPU VID Special Control.......................  -  Above VID * 110%

LDT Voltage Control...........................  -  1.30v 

Chip Set Voltage Control......................  -  1.60v

DRAM Voltage Control..........................  -  3.10v[/color]



[b]DRAM Configuration Settings:[/b]

[color=red]

DRAM Frequency Set............................  -  200=RAM/FSB:01/01

Command Per Clock (CPC).......................  -  Enable 

CAS Latency Control (Tcl).....................  -  2.5

RAS# to CAS# delay (Trcd).....................  -  04 Bus Clocks

Min RAS# active time (Tras)...................  -  08 Bus Clocks

Row precharge time (Trp)......................  -  04 Bus Clocks

Row Cycle time (Trc)..........................  -  10 Bus Clocks

Row refresh cyc time (Trfc)...................  -  16 Bus Clocks

Row to Row delay (Trrd).......................  -  03 Bus Clocks

Write recovery time (Twr).....................  -  03 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  4708 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

DRAM Drive Strength...........................  -  Auto

DRAM Data Drive Strength......................  -  Auto

Max Async Latency.............................  -  8.0 Nano Seconds

DRAM Response Time............................  -  Normal

Read Preamble Time............................  -  6.0 Nano Seconds

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  04 x

32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://www.angrygames.com/ocdb/angry/nf4/g...00_275x10-1.gif

 

 

3dMark2003:

 

geill4400_275x10-2.gif

 

 

3dMark2005:

 

geill4400_275x10-3.gif

 

 

Aquamark 3d:

 

geill4400_275x10-4.gif

 

 

 

 

==========

 

 

 

short description:

275x10 @ 2750Mhz, 1.500v + 110%

2.5-4-8-4 @ 3.10v vdimm

Share this post


Link to post
Share on other sites

DFI LanParty NF4 Ultra-D 704-2bta Bios

AMD Athlon64 3200+ Venice ADA3200BPBOX

OCZ EL Platinum Revision 2 (512*2) PC3200 TCCD Model #: OCZ4001024ELDCPER2-K

eVGA 256-P2-N515-AX Geforce 7800GT @ 1.5v 500Mhz Core 590Mhz Memory

WD Caviar SE WD800JD 80GB 7200 RPM 8MB Cache SATA150 Hard Drive

NEC Black DVD Burner Model: 3540A

Lite-On Black DVD-ROM Model: SOHD-16P9SBLK

OCZ Powerstream 520w PSU w/SLi Model: OCZ520ADJSLI

Thermaltake BigWater SE Water Cooling Kit w/VGA Waterblock

 

 

==========

 

Genie BIOS Settings:

 

FSB Bus Frequency - 270

LDT/FSB Frequency Ratio - 3x

LDT Bus Transfer Width - 16/16

CPU/FSB Frequency Ratio - 10x

PCI eXpress Frequency - 100

 

CPU VID Startup Control - 1.5v

 

CPU VID Control - 1.5v

CPU VID Special Control - Above VID * 113%

LDT Voltage Control - 1.3v

Chip Set Voltage Control - 1.5v

DRAM Voltage Control - 2.8v

 

 

DRAM Configuration Settings:

 

DRAM Frequency Set - 200 (DRAM/FSB:1/01)

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 06 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 09 Bus Clocks

Row refresh cyc time (Trfc) - 13 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 3072 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 255

DRAM Drive Strength - Weak 4

DRAM Data Drive Strength - Level 2

Max Async Latency - 7.0ns

DRAM Response Time - Normal

Read Preamble Time - 5.0ns

IdleCycle Limit - 256 Cycles

Dynamic Counter - Enable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

3DMark01 SE, Prime95, CPUZ Screens x2

 

3Dmark03

 

3DMark05

 

Aquamark3

 

Everest Memory Read Benchmark

 

Short Description:

270x10 @ 2700Mhz, 1.5v*113%

2.5-3-6-3 @ 2.8v vdimm

Share this post


Link to post
Share on other sites

Join the conversation

You can post now and register later. If you have an account, sign in now to post with your account.

Guest
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.

Sign in to follow this  

×
×
  • Create New...