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DFI LanParty nF3 UT 250Gb - 5/4 TicTac BIOS

 

AMD Sempron Palermo 2800+

 

Zalman CNPS7000b AlCu heatsink w/92MM fan

 

512Mb OCZ PC3200 Gold VX

 

Sapphire 9800NP flashed to Pro 128Mb Omega 2.5.9 (CAT 4.10) drivers

 

WD800JB HD - 8Mb cache

 

LiteOn CDRW SOHR 52395

 

Tagan TG480-U01 PSU (fully sleeved)

 

 

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 303

AGP Bus Frequency - 67

Clock Spread Spectrum - Disabled

LDT Downstream Width - AUTO

LDT Upstream Width - AUTO

LDT/FSB Frequency Ratio - AUTO

CPU/FSB Frequency Ratio - AUTO

 

 

 

 

CPU VID Control - 1.35v

CPU VID Special Control - Above VID * 123%

 

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 3.10v

 

DRAM Configuration Settings:

DRAM Frequency Set - 166=RAM/FSB:05/06

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.0

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 15 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3072 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 2

 

Max Async Latency - 7.0 Nano Seconds

 

Read Preamble Time - 5.0 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 08 x

Bypass Max - 04 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://img.photobucket.com/albums/v503/Blo...y/Backtest1.jpg

 

3dMark2003:

 

3D2003.jpg

 

 

3dMark2005:

 

3D2005.jpg

 

 

Aquamark 3d:

 

Aquamark1.jpg

 

 

==========

 

 

 

303x8 @ 2424Mhz, 1.35v + 123%

2-2-8-2 @ 3.1V vdimm

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DFI LANPARTY UT 250gb 5/04 Tic Tac Bios

 

AMD Sempron 2800+ 90nm Processor "Palermo"

 

2x512MB Centon Advance PC3200LL (TCCD)

 

ATI Radeon 9800XT 256MB AGP, Catalyst 5.7 Drivers - 450/400

 

Western Digital Caviar SE WD1600JB 160GB 7200 RPM 8M Cache IDE Ultra ATA100

 

NEC 3540A DVD-RW

 

Skyhawk 520w 24-pin ATX power supply ($39.99 @ newegg!!!!)

 

 

 

*

*

 

 

 

*

*

 

 

 

Genie BIOS Settings:

FSB Bus Frequency - 275 FSB

AGP Bus Frequency - 67

Clock Spread Spectrum - Disabled

LDT Downstream Width - Auto

LDT Upstream Width - Auto

LDT/FSB Frequency - x3.0

CPU/FSB Frequency Ratio - x8.0

 

 

CPU VID Control - 1.450v

CPU VID Special Control - Above VID * 113%

Chip Set Voltage Control - 1.70v

AGP Voltage Control - 1.70v

DRAM Voltage Control - 3.10v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200 (DRAM/FSB:1/01)

 

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 9 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 4708 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

 

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - 8.0 Nano Seconds

Read Preamble Time - 6.0 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disabled

R/W Queue Bypass - 16x

Bypass Max - 7x

32 Byte Granularity - Disabled (8 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51:

 

http://www.angrygames.com/ocdb/angry/nf3/2...ONE_275x8-1.jpg

 

 

3dMark2003:

 

nf3semp_GEILONE_275x8-2.jpg

 

 

3dMark2005:

 

nf3semp_GEILONE_275x8-3.jpg

 

 

Aquamark 3d:

 

nf3semp_GEILONE_275x8-4.jpg

 

 

==========

 

 

 

short description:

275x8 @ 2200Mhz, 1.450v + 113%

2.5-4-8-4 @ 3.10v vdimm

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  • 2 weeks later...

DFI LANPARTY UT 250gb Official 05/04/05 BIOS

 

AMD Athlon 64 3200+ Newcastle Processor Model ADA3200AEP4AX - CBAEC

 

0426SPAW stepping

 

2x512MB GeIL Ultra X PC3200 2-2-2-8 BH-5 @ DDR440

 

HiS Radeon 9800Pro 128MB, Catalyst 5.8(406/364)

 

Seagate 80 and 200GB SATA w/NCQ, 1x200GB PATA

 

Pioneer A09XLA DVD/RW 16X

 

Ultra-X Connect 500W Titanium Blue PSU

 

Homemade Watercooling

 

*

*

 

 

 

Genie BIOS Settings:

FSB Bus Frequency - 220 FSB

AGP Bus Frequency - 67mhz

Clock Spread Spectrum - Disabled

LDT Downstream Width - Auto

LDT Upstream Width - Auto

LDT/FSB Frequency - x4

CPU/FSB Frequency Ratio - x11

 

 

CPU VID Control - 1.35v

CPU VID Special Control - Avove VID * 126%

LDT Voltage Control - auto

Chip Set Voltage Control - 1.70v

AGP Voltage Control - 1.50v

DRAM Voltage Control - 3.00v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200 (DRAM/FSB:1/01)

 

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.0

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 01 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 04 Bus Clocks

Refresh Period (Tref) - 3072 Cycles

Write CAS Latency (Twcl) - 1 clk

DRAM Bank Interleave - Enabled

 

 

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 2

DRAM Data Drive Strength - Level 2

Max Async Latency - 6ns

Read Preamble Time - 5ns

IdleCycle Limit - 16 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(8 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.30 + :

 

http://img332.imageshack.us/my.php?image=ocdb9ef.jpg

 

 

3dMark2003:

 

3dmark035yc.th.jpg

 

 

3dMark2005:

 

3dmark058ir.th.jpg

 

 

Aquamark 3d:

 

aquamak1pk.th.jpg

 

Everest Read:

 

memoryread0cq.th.jpg

 

Everest Write:

 

memorywrite2lk.th.jpg

 

Everest Latency:

 

memorylatency7ku.th.jpg

 

 

==========

 

 

 

short description:

220x11 @ 2420Mhz, 1.350v + 126%

2.0-2-2-8 @ 3.0v vdimm

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DFI LANParty UT nF3 250Gb (6/23 Beta BIOS)

 

AMD Sempron 2800+ Palermo Rev. E6 (SDA2800AIO3BX LBBWE 0527EPAW)

 

1x512MB OCZ EL DDR PC-3200 Platinum Rev.2 1.1 (TCC5)

 

Albatron FX5200P 128MB AGP 8x (Detonator 44.03) (250/200)

 

80GB Seagate Baracuda IDE Ultra ATA100 IDE 8MB 7200RPM

 

NEC ND-3540A DVD Writer

 

Enermax 460W EG465P-VE(24P) PSU

 

Thermalright XP-90 with ThermalTake UFO fan

 

==============================================================

 

Genie BIOS Settings:

FSB Bus Frequency - 338 FSB

AGP Bus Frequency - 67mhz

Clock Spread Spectrum - Disabled

LDT Downstream Width - Auto

LDT Upstream Width - Auto

LDT/FSB Frequency - X 2.5

CPU/FSB Frequency Ratio - X 8

K8 Cool 'n' Quiet Support - Disabled

 

CPU VID Control - 1.30v

CPU VID Special Control - Above VID * 126%

Chip Set Voltage Control - 1.70v

AGP Voltage Control - 1.60v

DRAM Voltage Control - 2.80v

 

 

DRAM Configuration Settings:

DRAM Frequency Set - 166 (DRAM/FSB:5/06)

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 010 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 12 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 4078 Cycles

Write CAS Latency (Twcl) - 1 clk

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 1

Max Async Latency - 8.0ns

Read Preamble Time - 6.0ns

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(8 Bursts)

 

==============================================================

 

Prime95 + 3DMark2001SE + Everest 1.51 + CPU-Z + MBM5:

dfisemp28001tv.th.gif

 

3DMark2003:

dfisemp28003dm039zw.th.gif

 

3DMark2005:

dfisemp28003dm055vf.th.gif

 

Aquamark3:

dfisemp2800aqua31io.th.gif

 

Everest Read:

ehemr7vo.th.gif

 

Everest Write:

ehemw6rp.th.gif

 

Everest Latency:

eheml6pk.th.gif

 

****************************

Short description:

338x8 @ 2704Mhz, 1.30v + 126%

2.5-4-3-10-1T @ 2.8v

****************************

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DFI NF4X Infinity Socket754 motherboard, 9/07/2005 bios

 

AMD Sempron 3100+ Palermo, 64-bit SSE3 instructions

 

2x512MB OCZ PC4400 Beta (Hynix based)

 

XFX GeForce 7800GTX, 78.03 drivers, 489/1311

 

Maxtor 160GB 8mb cache IDE hdd

 

Asus 52x Quiet-Trak CD-ROM

 

Skyhawk 520w 24-pin ATX power supply

 

Thermalright XP-90 heatsink + Thermalright 92mm fan

 

 

*

*

 

300x9_bios-1.jpg

 

300x9_bios-2.jpg

 

300x9_bios-3.jpg

 

*

*

 

 

 


[b]Genie BIOS Setting[/b]

[color=red]

CPU Frequency....................... - 300Mhz

Hammer FID Control.................. - StartUp

HT Frequency........................ - 3x

HT Width............................ - 16/16

PCI-E Clock......................... - 100Mhz



DDR Voltage Control................. - 2.9v

Chip Voltage Control................ - 1.6v

CPU Voltage Control................. - 1.700v

[/color]



[b]DRAM Configuration[/b]

[color=red]

Timing Mode......................... - Manual

Memclock Mode....................... - Limit

Memclock Index Value (Mhz).......... - 166Mhz CPU:DDR 6:5



CAS# Latencly (Tcl)................. - 3

Min RAS# Active Time (Tras)......... - 8T

RAS# to CAS# Delay (Trcd)........... - 4T

Row Precharge Time (Trp)............ - 4T

Row to Row Delay (Trrd)............. - 3T

Row Cycle Time (Trc)................ - 12T

Row Refresh Cycle Time (Trfc)....... - 24T

Write Recovery Time (Twr)........... - Auto

Write-to-Read Delay (Twtr).......... - Auto

Read-to-Write Delay (Trwt).......... - Auto

Refresh Rate (Tref)................. - Auto

DDR Output Driving.................. - Auto

DDR DQ Drive Strenght............... - Auto



1T/2T Memory Timing................. - 2T

Read Preamble Value................. - 5.5ns

Asynch Latency Value................ - 7ns

Dynamic Idle Cycle Counter.......... - Auto

DRAM Bank Interleaving.............. - Enabled

Burst Length........................ - 4 Beats

Enable All DIMM Clock............... - Disabled

S/W Memory Hole Remapping........... - Disabled

H/W Memory Hole Remapping........... - Disabled

MTRR Mapping Mode................... - Continuous



[/color]

 

 

 

 

 

Prime95, 2x CPU-Z, Everest Home Edtion 2.20, 3dMark2001SE:

 

http://www.angrygames.com/ocdb/angry/nf4/n...400/300x9-1.jpg

 

 

 

3dMark2003:

 

300x9-2.jpg

 

 

 

3dMark2005:

 

300x9-3.jpg

 

 

 

Aquamark 3d:

 

300x9-4.jpg

 

 

 

AMD Nbench:

 

300x9-5.jpg

 

 

 

 

 

 

Short Description:

300x9 @ 2700Mhz, DDR166 divider

3-4-4-8, 2.8v vdimm

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DFI NF4X Infinity Socket754 motherboard, 9/07/2005 bios

 

AMD Sempron 3100+ Palermo, 64-bit SSE3 instructions

 

2x512MB Crucial Ballistix PC4000

 

XFX GeForce 7800GTX, 81.82 drivers, 489/1311

 

Maxtor 160GB 8mb cache IDE hdd

 

Asus 52x Quiet-Trak CD-ROM

 

Skyhawk 520w 24-pin ATX power supply

 

Thermalright XP-90 heatsink + Thermalright 92mm fan

 

 

*

*

 

ballistix_250x9_bios-1.jpg

 

ballistix_250x9_bios-1b.jpg

 

ballistix_250x9_bios-2.jpg

 

*

*

 

 

 


[b]Genie BIOS Setting[/b]

[color=red]

CPU Frequency....................... - 250Mhz

Hammer FID Control.................. - StartUp

HT Frequency........................ - 3x

HT Width............................ - 16/16

PCI-E Clock......................... - 100Mhz



DDR Voltage Control................. - 3.0v

Chip Voltage Control................ - 1.6v

CPU Voltage Control................. - 1.650v

[/color]



[b]DRAM Configuration[/b]

[color=red]

Timing Mode......................... - Manual

Memclock Mode....................... - Limit

Memclock Index Value (Mhz).......... - 200Mhz CPU:DDR 1:1



CAS# Latencly (Tcl)................. - 2.5

Min RAS# Active Time (Tras)......... - 8T

RAS# to CAS# Delay (Trcd)........... - 3T

Row Precharge Time (Trp)............ - 3T

Row to Row Delay (Trrd)............. - 3T

Row Cycle Time (Trc)................ - 12T

Row Refresh Cycle Time (Trfc)....... - 24T

Write Recovery Time (Twr)........... - 3 bus clock

Write-to-Read Delay (Twtr).......... - 2 bus clock

Read-to-Write Delay (Trwt).......... - 3 bus clock

Refresh Rate (Tref)................. - 3120 Cycle

DDR Output Driving.................. - Auto

DDR DQ Drive Strenght............... - Auto



1T/2T Memory Timing................. - 1T

Read Preamble Value................. - 6ns

Asynch Latency Value................ - 8ns

Dynamic Idle Cycle Counter.......... - 256 Cycle

DRAM Bank Interleaving.............. - Enabled

Burst Length........................ - 4 Beats

Enable All DIMM Clock............... - Disabled

S/W Memory Hole Remapping........... - Disabled

H/W Memory Hole Remapping........... - Disabled

MTRR Mapping Mode................... - Continuous



[/color]

 

 

 

 

 

Prime95, 2x CPU-Z, Everest Home Edtion 2.20, 3dMark2001SE:

 

http://www.angrygames.com/ocdb/angry/nf4/n...tix_250x9-1.jpg

 

 

 

3dMark2003:

 

ballistix_250x9-2.jpg

 

 

 

3dMark2005:

 

ballistix_250x9-3.jpg

 

 

 

Aquamark 3d:

 

ballistix_250x9-4.jpg

 

 

 

 

 

 

 

 

Short Description:

250x9 @ 2250Mhz

2.5-3-3-8, 3.0v vdimm

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  • 2 weeks later...

DFI NF4X Infinity Socket754 motherboard, 9/07/2005 bios

 

AMD Sempron 3100+ Palermo, 64-bit SSE3 instructions

 

2x512MB Crucial Ballistix PC4000

 

XFX GeForce 7800GTX, 78.03 drivers, 489/1311

 

Maxtor 160GB 8mb cache IDE hdd

 

Asus 52x Quiet-Trak CD-ROM

 

Seasonic S12-600 600w ATX psu

 

Thermalright XP-90 heatsink + Thermalright 92mm fan

 

 

*

*

 

 

 

*

*

 

 

 


[b]Genie BIOS Setting[/b]

[color=red]

CPU Frequency....................... - 300

Hammer FID Control.................. - StartUp

HT Frequency........................ - 3x

HT Width............................ - 16/16

PCI-E Clock......................... - 100Mhz



DDR Voltage Control................. - 3.0v

Chip Voltage Control................ - 1.6v

CPU Voltage Control................. - 1.7250v

[/color]



[b]DRAM Configuration[/b]

[color=red]

Timing Mode......................... - Manual

Memclock Mode....................... - Limit

Memclock Index Value (Mhz).......... - 166Mhz CPU:DDR 6:5



CAS# Latencly (Tcl)................. - 2.5

Min RAS# Active Time (Tras)......... - 8T

RAS# to CAS# Delay (Trcd)........... - 3T

Row Precharge Time (Trp)............ - 3T

Row to Row Delay (Trrd)............. - 3T

Row Cycle Time (Trc)................ - 12T

Row Refresh Cycle Time (Trfc)....... - 24T

Write Recovery Time (Twr)........... - 3 bus clock

Write-to-Read Delay (Twtr).......... - 2 bus clock

Read-to-Write Delay (Trwt).......... - 3 bus clock

Refresh Rate (Tref)................. - 3120 Cycle

DDR Output Driving.................. - Auto

DDR DQ Drive Strenght............... - Auto



1T/2T Memory Timing................. - 1T

Read Preamble Value................. - 6ns

Asynch Latency Value................ - 8ns

Dynamic Idle Cycle Counter.......... - 256 Cycle

DRAM Bank Interleaving.............. - Enabled

Burst Length........................ - 4 Beats

Enable All DIMM Clock............... - Disabled

S/W Memory Hole Remapping........... - Disabled

H/W Memory Hole Remapping........... - Disabled

MTRR Mapping Mode................... - Continuous



[/color]

 

 

 

 

 

Prime95, 2x CPU-Z, Everest Home Edtion 2.20, 3dMark2001SE:

 

http://www.angrygames.com/ocdb/angry/nf4/n...00x9_nf4x-1.jpg

 

 

 

3dMark2003:

 

ballistix300x9_nf4x-2.jpg

 

 

 

3dMark2005:

 

ballistix300x9_nf4x-3.jpg

 

 

 

Aquamark 3d:

 

ballistix300x9_nf4x-4.jpg

 

 

 

AMD NBench

 

ballistix300x9_nf4x-5.jpg

 

 

 

 

 

 

 

 

Short Description:

300x9 @ 2700Mhz

2.5-3-3-8, 3.0v vdimm

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DFI LANPARTY UT 250gb 5/04/05 Bios

 

AMD A64 DTR 3200+ 1Mb CH SH7-CG AMA3200BEX5AR CAACC 0422XPMW

 

2x512MB GSkill 3200 GBle (TCCD)

 

eVGA 6800GT 256MB AGP, 77.72 Drivers - stock

 

Western Digital Raptor WD740GD 74GB & Seagate Barracuda 7200.7 ST3120026A 120GB

 

NEC 3500AG DVD-RW & SAMSUNG TS-H492A COMBO 52x32x52x16

 

Creative Sound Blaster Audigy2 ZS GAMER Limited Edition

 

OCZ PowerStream OCZ520ADJ

 

H20 CPU only - Cathar Storm G4 original -D-TEK Customs Pro Radiator w/shround externally mounted via Swiftech Rad Box -AquaXtreme 50Z-DC12

 

 

*

*

 

 

 

*

*

 

 

 

Genie BIOS Settings:

FSB Bus Frequency - 262 FSB

AGP Bus Frequency - 67

Clock Spread Spectrum - Disabled

LDT Downstream Width - Auto

LDT Upstream Width - Auto

LDT/FSB Frequency - x3.0

CPU/FSB Frequency Ratio - x10.0

 

 

CPU VID Control - 1.475v

CPU VID Special Control - Above VID * 123%

Chip Set Voltage Control - 1.70v

AGP Voltage Control - 1.60v

DRAM Voltage Control - 2.90v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200 (DRAM/FSB:1/01)

 

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 10 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 7 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - 01 Bus Clocks

DRAM Bank Interleave - Enabled

 

 

 

DQS Skew Control - Increase

DQS Skew Value - 128

DRAM Drive Strength - Level 1

DRAM Data Drive Strength - N/A

Max Async Latency - 7.0 Nano Seconds

Read Preamble Time - 5.0 Nano Seconds

IdleCycle Limit - 016 Cycles

Dynamic Counter - Disabled

R/W Queue Bypass - 8x

Bypass Max - 4x

32 Byte Granularity - Disabled (8 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 1.51 latency:

 

dfiocdbpic1r15wg.th.jpg

 

 

3dMark2003:

 

dfiocdbpic2r18rt.th.jpg

 

 

 

3dMark2005:

 

dfiocdbpic3r18gy.th.jpg

 

 

Aquamark 3d:

 

dfiocdbpic4r10vu.th.jpg

 

 

Everest 1.51 Read:

 

dfiocdbpic5ar19sg.th.jpg

 

 

Everest 1.51 Write:

 

dfiocdbpic5br12lu.th.jpg

 

 

OCCT, cpuZ 1.29, CBID 4.0.0.77:

 

dfiocdbpic6r1occtcpuz1tx.th.jpg

 

 

==========

 

 

 

short description:

262x10 @ 2620Mhz, 1.475v + 123%

2.5-3-10-3 @ 2.90v vdimm

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  • 3 weeks later...

DFI LANPARTY UT 250gb 5/04/05 Bios

 

AMD A64 DTR 3200+ 1Mb CH SH7-CG AMA3200BEX5AR CAACC 0422XPMW

 

OCZ EB DDR PC-4000 2x1024MB Platinum Edition

 

eVGA 6800GT 256MB AGP, 77.72 Drivers - stock

 

Western Digital Raptor WD740GD 74GB & Seagate Barracuda 7200.7 ST3120026A

 

120GB

 

NEC 3500AG DVD-RW & SAMSUNG TS-H492A COMBO 52x32x52x16

 

Creative Sound Blaster Audigy2 ZS GAMER Limited Edition

 

OCZ PowerStream OCZ520ADJ

 

 

H20 CPU only - Cathar Storm G4 original -D-TEK Customs Pro

 

Radiator w/shround externally mounted via Swiftech Rad Box -AquaXtreme 50Z-DC12

 

 

*

*

 

 

 

*

*

 

 

 

Genie BIOS Settings:

FSB Bus Frequency - 260 FSB

AGP Bus Frequency - 67

Clock Spread Spectrum - Disabled

LDT Downstream Width - Auto

LDT Upstream Width - Auto

LDT/FSB Frequency - x3.0

CPU/FSB Frequency Ratio - x10.0

 

 

CPU VID Control - 1.475v

CPU VID Special Control - Above VID * 123%

Chip Set Voltage Control - 1.70v

AGP Voltage Control - 1.60v

DRAM Voltage Control - 2.70v

 

DRAM Configuration Settings:

DRAM Frequency Set - 166 (DRAM/FSB:5/06)

 

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.0

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 8 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 13 Bus Clocks

Row refresh cyc time (Trfc) - 15 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 04 Bus Clocks

Refresh Period (Tref) - 3072 Cycles

Write CAS Latency (Twcl) - 01 Bus Clocks

DRAM Bank Interleave - Enabled

 

 

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 3

DRAM Data Drive Strength - N/A

Max Async Latency - 7.0 Nano Seconds

Read Preamble Time - 5.0 Nano Seconds

IdleCycle Limit - 016 Cycles

Dynamic Counter - Enable

R/W Queue Bypass - 8x

Bypass Max - 4x

32 Byte Granularity - Auto

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 1.51 latency:

 

dfiocdbpic1eb14sh.th.jpg

 

 

3dMark2003:

 

dfiocdbpic2eb10bb.th.jpg

 

 

 

3dMark2005:

 

dfiocdbpic3eb17mq.th.jpg

 

 

 

Aquamark 3d:

 

dfiocdbpic4eb19tt.th.jpg

 

 

 

Everest 1.51 Read:

 

dfiocdbpic5eb19by.th.jpg

 

 

Everest 1.51 Write:

 

dfiocdbpic6eb14fo.th.jpg

 

 

OCCT, cpuZ 1.29, CBID 4.0.0.77:

 

dfiocdbpic7eb13ut.th.jpg

 

 

==========

 

 

 

short description:

260x10 @ 2601Mhz, 1.475v + 123%

2.0-3-8-2 @ 2.70v vdimm

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  • 4 weeks later...

DFI NF4X Infinity Socket754 motherboard, 10/19/2005 bios

 

AMD A64 3700+ Clawhammer CAAZC 0439

 

2x512MB TwinMos Speed Premium (BH-5)

 

eVGA 7800GT CO 470/1100

 

Western Digital 160GB 8mb cache IDE hdd

 

Lite-On SOHW-1693S DVD DL Burner

 

OCZ Powerstream 520w 24-pin ATX power supply

 

Zalman CNPS-7000 al/cu HSF

 

 

*

*

 

picture1481mi.th.jpg

 

picture1494sk.th.jpg

 

picture1505dk.th.jpg

 

*

*

 

 

 


[b]Genie BIOS Setting[/b]

[color=red]

CPU Frequency....................... - 210Mhz

Hammer FID Control.................. - x12

HT Frequency........................ - 4x

HT Width............................ - 16/16

PCI-E Clock......................... - 100Mhz



AMD K8 Cool & Quiet................. - Disable

DDR Voltage Control................. - 3.0v

Chip Voltage Control................ - 1.7v

CPU Voltage Control................. - 1.600v

[/color]



[b]DRAM Configuration[/b]

[color=red]

Timing Mode......................... - Manual

Memclock Mode....................... - Limit

Memclock Index Value (Mhz).......... - 200Mhz CPU:DDR 1:1



CAS# Latencly (Tcl)................. - 2.5

Min RAS# Active Time (Tras)......... - 8T

RAS# to CAS# Delay (Trcd)........... - 3T

Row Precharge Time (Trp)............ - 2T

Row to Row Delay (Trrd)............. - Auto

Row Cycle Time (Trc)................ - 12T

Row Refresh Cycle Time (Trfc)....... - 24T

Write Recovery Time (Twr)........... - Auto

Write-to-Read Delay (Twtr).......... - Auto

Read-to-Write Delay (Trwt).......... - Auto

Refresh Rate (Tref)................. - Auto

DDR Output Driving.................. - Auto

DDR DQ Drive Strenght............... - Auto



1T/2T Memory Timing................. - 2T

Read Preamble Value................. - 5.5ns

Asynch Latency Value................ - 7ns

Dynamic Idle Cycle Counter.......... - Auto

DRAM Bank Interleaving.............. - Disabled

Burst Length........................ - 4 Beats

Enable All DIMM Clock............... - Disabled

S/W Memory Hole Remapping........... - Disabled

MTRR Mapping Mode................... - Continuous



[/color]

 

 

 

 

 

Prime95, 2x CPU-Z, Everest Home Edtion 2.20, 3dMark2001SE:

 

testrunsmall1zm.th.jpg

 

 

 

3dMark2003:

 

03small6km.th.jpg

 

 

 

3dMark2005:

 

05small7wq.th.jpg

 

 

Aquamark 3d:

 

aquamarkcopy5is.th.jpg

 

 

 

A64 Tweaker v0.60 beta:

 

a64tweakercopy0oh.th.jpg

 

 

 

 

 

Short Description:

210x12 @ 2522Mhz, DDR200 divider

2.5-3-2-8, 3.0v vdimm

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  • 2 months later...

DFI LANPARTY UT 250gb 623 Bata Bios

 

AMD Sempron 2600+ 90nm Processor "Palermo"SDE2600EIO2BX lbbwe 0536 rpmw

 

2x256MB Corsair 3200XL (TCCD)

 

NVIDIA GeForce4 Ti 4600

 

80 Gig Hitachi Sata 11

 

NEC DVD RW ND-4570A

 

Q-TEC 24-pin ATX 550 Watts power supply

 

 

 

*

 

 

 

Genie BIOS Settings:

FSB Bus Frequency - 345 FSB

AGP Bus Frequency - 67

Clock Spread Spectrum - Disabled

LDT Downstream Width - Auto

LDT Upstream Width - Auto

LDT/FSB Frequency - x2.5

CPU/FSB Frequency Ratio -x8.0

 

 

CPU VID Control - 1.550v

CPU VID Special Control- Above VID * 113%

Chip Set Voltage Control- 1.90v

AGP Voltage Control - 1.70v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - 166

 

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 13 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - 01 Bus Clocks

DRAM Bank Interleave - Enabled

 

 

 

DQS Skew Control - Increase Skew

DQS Skew Value - 0

DRAM Drive Strength - Level 1

DRAM Data Drive Strength - Auto

Max Async Latency - 9.0 Nano Seconds

Read Preamble Time - 5.5 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Enable

R/W Queue Bypass - 16x

Bypass Max - 7x

32 Byte Granularity - Disabled (8 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.28

 

12xk2.th.jpg

 

 

3dMark2003:

 

3dmark03clocked5mu.th.png

 

 

 

 

3dMark2005:

 

36sh1.jpg

 

Aquamark 3d:

 

aquamark3clocked7nm.th.png

 

==========

 

Everest Read

 

53kt.th.jpg

 

Everest Write

 

64co.th.jpg

 

Everest Latency

 

71xs.th.jpg

 

A64Tweker

 

84hl1.th.jpg

 

 

short description:

345x8 @ 2760Mhz, 1.550v + 113%

2.5-4-8-3 @ 2.80v vdimm

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  • 1 month later...

DFI LanParty nF3 UT 250GB, 5/04 Bios

http://www.newegg.com/Product/Product.asp?Item=N82E16813136147

 

AMD64 Mobile 4000+ Newark E5 stepping

http://www.monarchcomputer.com/Merchant2/merchant.mv?

 

Mushkin 2x512MB PC3200 CL2 Blue Dual Pack 3602905

 

Celestica Radeon 9600xt Gold Edition 128MB

 

Seagate Barracuda SATA 120GB, 250GB

 

Benq DW1620 DVD-RW

 

Antec 380W (included in Sonata Case)

Thermal Right XP120 HSF

Genie BIOS Settings:

FSB Bus Frequency - 335 FSB

AGP Bus Frequency - 67

Clock Spread Spectrum - Disabled

LDT Downstream Width - Auto

LDT Upstream Width - Auto

LDT/FSB Frequency - x2.5

CPU/FSB Frequency Ratio - x9.0

 

 

CPU VID Control - 1.5v

CPU VID Special Control - auto

Chip Set Voltage Control - 1.70v

AGP Voltage Control - 1.60v

DRAM Voltage Control - 3.10v

 

DRAM Configuration Settings:

DRAM Frequency Set - 133 (DRAM/FSB:2/3)

 

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.0

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 06 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 9 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 01 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - 1

DRAM Bank Interleave - Enabled

 

 

 

DQS Skew Control - Increase

DQS Skew Value - 64

DRAM Drive Strength - 1

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

Read Preamble Time - Auto

IdleCycle Limit - 16 Cycles

Dynamic Counter - Enabled

R/W Queue Bypass - 16x

Bypass Max - 7x

32 Byte Granularity - Disabled (8 Bursts)

 

 

==========

 

prime95testresult24jx.th.jpg

3dmark037bz.th.jpg

3dmark059em.th.jpg

everest151read4tj.th.jpg

everest151write29br.th.jpg

everest151latency29hy.th.jpg

==========

 

 

short description:

335x9 @ 3015 Mhz, 1.5v

2-2-6-2 @ 3.10v vdimm

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