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G.Skill HZ/Any other UCCC (2x1024) 260+ please post here


ooztuncer

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I'm still waiting on any screenshots of Thread #1's GSkill Cheatsheets since I don't have Excel. Could anyone post them here or send me via PM?? I'm still playing with my sticks, got it stable to around 260 mhz.....I wanna compare before I put my entries on here.....

 

Screenshots....Anyone?????

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FSB - 315

LDT - x3

CPU/FSB Ratio - x9

Vcore - 1.325

LDT - 1.6

DIMM - 2.7

 

DRAM Frequency Set - 166

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3.0

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 04 Bus Clocks

Row Cycle time (Trc) - 08 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - Auto (A64 Shows 166 3.9us)

Write CAS Latency (Twcl) - 01

DRAM Bank Interleave - Enabled

 

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - 8.0ns

Read Preamble Time - 5.0ns

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(8 Bursts)

 

OCCT Tested - Failed at 2.6 vdimm

Passed at 2.7 vdimm :D

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i still have to play with the bios dram page, but so far so good. all the question marks mean i can't remember. my comp is not connected to the internet, i'm at the library. i'll update soon *UPDATE-1*

 

Expert 04/06

Opty 165 @ 2704mhz ORTHOS stable

G.Skill DDR500 HZ @ 270.4mhz DDR540 Memtest stable

 

FSB - 338

LDT - x3

CPU/FSB Ratio - x8

Vcore - 1.475

LDT - 1.5

NB - 1.72

DIMM - 2.8

 

DRAM Frequency Set - 166

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3.0

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 07 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - ?

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - ?

Write CAS Latency (Twcl) - ?

DRAM Bank Interleave - ?

 

DRAM Drive Strength - ?

DRAM Data Drive Strength - ?

Max Async Latency - ?

Read Preamble Time - ?

IdleCycle Limit - ?

Dynamic Counter - Enable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(8 Bursts)

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Well, my last pair of sticks died on me. I only changed the settings to 3-4-4-8, 1:1, 1T and set the FSB to 250 and everything was fine for about 8 months. Then they died, I RMA'd them and now I have the new sticks. I did the same thing but it won't boot at those settings. I tried the settings that the GSkill rep posted on page ~2, and that doesn't work at DDR500 either.

 

Do I have a bad pair again? What's going on? Thanks for any insight.

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Guest Blooz1

Loony, maybe what you should do is to test each stick individually at stock speeds with Memtest to determine if there's any problems prior to trying your O/C.

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Loony, maybe what you should do is to test each stick individually at stock speeds with Memtest to determine if there's any problems prior to trying your O/C.

 

Did that. Ran three tests, only one stick twice, and then both sticks. Passed all times full test.

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