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Couple WPCR Tweaks


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Here are a couple WPCREDIT/WPCRSET register tweaks (these may be helpful for those using a BIOS that doesn't have these options):

 

AGP Controller Latency

 

Bus 0, Device 30, Function 0

Offset (Register) 0D

 

AGP Bus Latency

 

Bus 0, Device 30, Function 0

Offset (Register) 1B

 

PCI Latency

 

Bus 0, Device 8, Function 0

Offset (Register) 1B

 

Here are some data (values) that can be set:

 

16 (clocks) = 10 (data)

32 = 20 this is the default for every BIOS except 1/21

64 = 40

96 = 60

128 = 80

160 = A0

192 = C0

224 = E0

255 = FF default AGP Controller Latency for BIOS 1/21

 

Note: if you set AGP Bus Latency to 128 clocks or higher, it is advisable to leave PCI Latency at the default 32 clocks.

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:) AdModDev. I just flashed both the 12/31 and the 1/21; last night, after sticking the 1.775volt mod back in and the 12/31 is showing AGP=32 and the 01/21 is showing AGP=255.

 

Too many bioses to keep track of. Hehehehe.

 

Sincerely, RGone...:)

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Originally posted by AdvModDev

You sure it wasn't the 1/21 release notes you were looking at Viper? I'm certain that 1/21 is the only one that defaults AGP Latency to FF.

 

Yep they sure were lol. To many date sections in the notes for this old fart to keep straight lol!

 

Viper

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Happy Overclocking

 

					****************************

				* nVidia nForce2 Data Base *

				****************************





1) AGP Latency

 *************

PCI Bus#2 Dev#0 Func#0 Offset#0D



		  0D

- 16  clock : 10

- 32  clock : 20

- 64  clock : 40

- 96  clock : 60

- 128 clock : 80

- 160 clock : A0

- 192 clock : C0

- 224 clock : E0

- 255 clock : FF



2) PCI Latency

 *************

PCI Bus#0 Dev#8 Func#0 Offset#1B



		  1B	

- 16  clock : 10

- 32  clock : 20

- 64  clock : 40

- 96  clock : 60

- 128 clock : 80

- 160 clock : A0

- 192 clock : C0

- 224 clock : E0

- 255 clock : FF





3) CPU Disconnect Function

 *************************

PCI Bus#0 Dev#0 Func#0 Offset#6C,6D,6E,6F



		6C 6D 6E 6F

- Enable  : 01 FF 01 1F/9F

- Disable : 01 FF 01 8F





4) Command Per Clock (T1/T2)

 *******************

  PCI Bus#0 Dev#0 Func#1 Offset#84,85,86,87



		84 85 86 87

- Enable  : F3 13 0F 03 

- Disable : F3 13 0F 23 



WARNING! (Not Editable after boot, Can only be set before memory sizing)





5) Alpha Memory Setting

 **********************

PCI Bus#0 Dev#0 Func#1 Offset#94,95,96,97



		94 95 96 97

- T(DOE)  :		 x	Selectable Value: 0,1,2,3,4,5,6

- T(RRD)  :		   x Selectable Value: 0,1,2,3,4,5,6

- T(W2P)  :	   x	Selectable Value: 0,1,2,3,4,5,6

- T(W2R)  :		x	Selectable Value: 0,1,2,3,4,5,6

- T(REXT) :	x	Selectable Value: 0,1,2,3

- T(R2P)  :	 x	Selectable Value: 0,1,2,3,4,5,6

- T(R2W)  : x 		Selectable Value: 0,1,2,3,4,5,6

- reserved:  -		Selectable Value: -



- Offset 94 = XY

	X= T(R2W)	Selectable Value: 0,1,2,3,4,5,6

	Y= Reserved	-



- Offset 95 = XY

	X= T(REXT)	Selectable Value: 0,1,2,3,

	Y= T(R2P)	Selectable Value: 0,1,2,3,4,5,6



- Offset 96 = XY

	X= T(W2P)	Selectable Value: 0,1,2,3,4,5,6

	Y= T(W2R)	Selectable Value: 0,1,2,3,4,5,6



- Offset 97 = XY

	X= T(DOE)	Selectable Value: 0,1,2,3,4,5,6

	Y= T(RRD)	Selectable Value: 0,1,2,3,4,5,6



6) Normal Memory Setting

 ***********************

  PCI Bus# Dev# Func# Offset#





  - T(RAS)	:

  - T(RCD-Read)	:

  - T(RCD-Write)	:

  - T(RP)		:

  - CAS Latency	:

  - T(RC)		:

  - T(RFC)	:

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awesome thanks!

 

I know the CPU disconnect was an option on my ABit board but not the DFI. Is this enabled in the background by default or does the DFI not have anything regarding the CPU Disconnect Function.

 

Wondering if anyone can insert an ISA rom with these changes into a bios so we can have them without having to use wpcredit.

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when dealing with the CPU Disconnect function does it matter whether 1F or 9F is selected as they both seem to mean enabled? Is one better or worse than the other? Just checking with wpcredit mine is 9F as default. Should I change to 1F?

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Originally posted by cantankerous

awesome thanks!

 

I know the CPU disconnect was an option on my ABit board but not the DFI. Is this enabled in the background by default or does the DFI not have anything regarding the CPU Disconnect Function.

 

Wondering if anyone can insert an ISA rom with these changes into a bios so we can have them without having to use wpcredit.

 

i can build isa rom and embended it DFI bios... Cheers

 

ops i iss another 1..

 

7) Side Band Addressing

 **********************

PCI Bus#0 Dev#0 Func#0 Offset#49



		49

- Enable  : 03

- Disable : 01

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Originally posted by cantankerous

when dealing with the CPU Disconnect function does it matter whether 1F or 9F is selected as they both seem to mean enabled? Is one better or worse than the other? Just checking with wpcredit mine is 9F as default. Should I change to 1F?

 

1F is da best bro.. :) :angel:

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ah ok so it is worth changing then awesome.

 

Make an ISA rom imbedded into 6/19 with CPU Disconnect at 1F and PCI latency at 64=40.

 

That would kick butt. I have always been wanting a higher PCI Latency.

 

Big ups to Tictac again!

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