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Ram doesnt like Dividers


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I'm looking for some advice for my ram. I would really like to overlcock my cpu to its full potential but the ram is holding me back and I dont have enough money to upgrade right now. My cpu is stable at 2.65ghz with 1.56 vcore. I can run LARGE FFTS in prime for 18+ hours like that. But the minute I try to run 3dmark the system will freeze because I cant get the ram stable even using a divider and having it run below ddr400 speeds. The ram does past MemTest just wont be stable in windows.

 

I have tried quite alot of different settings to try and get the ram to work on a divider. The problem is anything below the 166mhz divider is just not stable at all. I can run the ram fine on the 166mhz divider using timings of 2.5,3,7 with the ram @ ddr400. When I try to use a lower divider the memory is not stable. I have even tried it with timings of 3,4,4,8 and thats running below DDR 400 speeds. I have tried with Dram interleave disabled. I tried upping my Vdimm. I have also tried various drive strength options.

 

Basically I'm looking for advice on things I could try.If not I'll just wait until I have better ram. I know this ram isnt very good so I'm not expecting much but it would be nice :)

 

If you read this, Thank you for your time.

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Some of the lower dividers (under 166) are just buggy with some cpu's but its not a consistent thing.. sometimes messing with Max Async and Preamble get things stable..

 

What are you using for all the other timings ? Please post all your dram settings..

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These are the settings I am currently using in windows. It is perfectly stable.

 

DRAM Configuration Settings:

DRAM Frequency Set - 166

Command Per Clock (CPC) - Auto

CAS Latency Control (Tcl) - 3

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 07 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 08 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - 7 ns

DRAM Response Time - Normal

Read Preamble Time - 6.5 ns

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

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So far, I was only lucky with 166 and 133 dividers. All others didn't work properly...

 

But: This also might be a matter of your CPUs IMC... you might want to try a burn-in on those components, like giving high CPU and DRAM voltage to them at standard clocks for a couple of hours. Might help.

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Well, you "age" your components with this. Some manufacturers do even burn-in their components before delivery to have lower failure rates or better performance.

 

Like for me, a fresh board or CPU normally doesn't work too well. But after some time they behave much better or work at higher clocks.

If you don't want to wait, you do a burn-in to speed-up the aging and to have the components work well right away.

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