RGone Posted July 16, 2004 Posted July 16, 2004 :confused: but according to most of the testing I have done with PCi latency on the Silicon image series of Controllers> to up the PCi latency is to slow the controller in most every test I have run. Silicon Image does not make contact across the PCi buss the same way that HI-point and Promise do. I know what you think you wanted but the contrary has proven out for most of the Sil controllers. In fact if not careful it will get in the way of the AGP buss latency. This is not an old Via chipset nor is the controller design the same. Sincerely, RGone... Share this post Link to post Share on other sites More sharing options...
cantankerous Posted July 16, 2004 Posted July 16, 2004 hmmm well I suppose I can test and see for myself. I will let you know how it goes. I like the CPU disconnect function however as my ABIT had that from the start and it drastically drops temps when your cpu is idle or only under minimal use. Share this post Link to post Share on other sites More sharing options...
AdvModDev Posted July 16, 2004 Posted July 16, 2004 Originally posted by tictac Happy Overclocking **************************** * nVidia nForce2 Data Base * **************************** 1) AGP Latency ************* PCI Bus#2 Dev#0 Func#0 Offset#0D 0D - 16 clock : 10 - 32 clock : 20 - 64 clock : 40 - 96 clock : 60 - 128 clock : 80 - 160 clock : A0 - 192 clock : C0 - 224 clock : E0 - 255 clock : FF 5) Alpha Memory Setting ********************** PCI Bus#0 Dev#0 Func#1 Offset#94,95,96,97 94 95 96 97 - T(DOE) : x Selectable Value: 0,1,2,3,4,5,6 - T(RRD) : x Selectable Value: 0,1,2,3,4,5,6 - T(W2P) : x Selectable Value: 0,1,2,3,4,5,6 - T(W2R) : x Selectable Value: 0,1,2,3,4,5,6 - T(REXT) : x Selectable Value: 0,1,2,3 - T(R2P) : x Selectable Value: 0,1,2,3,4,5,6 - T(R2W) : x Selectable Value: 0,1,2,3,4,5,6 - reserved: - Selectable Value: - - Offset 94 = XY X= T(R2W) Selectable Value: 0,1,2,3,4,5,6 Y= Reserved - - Offset 95 = XY X= T(REXT) Selectable Value: 0,1,2,3, Y= T(R2P) Selectable Value: 0,1,2,3,4,5,6 - Offset 96 = XY X= T(W2P) Selectable Value: 0,1,2,3,4,5,6 Y= T(W2R) Selectable Value: 0,1,2,3,4,5,6 - Offset 97 = XY X= T(DOE) Selectable Value: 0,1,2,3,4,5,6 Y= T(RRD) Selectable Value: 0,1,2,3,4,5,6 Greets tictac. I was planning on tackling the Alpha mem settings next but you worked it out alread. Saves me alot of reboots...thanks;) I do see one error -> AGP Latency. Neither AGP Controller Latency nor AGP Bus Latency are accessed via Bus 2, Dev 0, Func 0 (VGA Compatible Device). These latencies are actually accessed via Bus 0, Dev 30, Func 0 (PCI-PCI Bridge). Share this post Link to post Share on other sites More sharing options...
tictac Posted July 16, 2004 Posted July 16, 2004 sorry i'm quite busy lately... anyway i will show u how to build the isa rom... here header: 55 AA ; Boot Able rom 01; 512bytes of rom jmp init; jump to code intialization retf; return far to system bios file INIT pushad push eax push edx mov eax,0x80002184; eax=Bus0Dev2Func1,Offset 84,85,86,87 mov dx,0cf8; set dx as adress port out dx,eax; send the address to IO Space throgh dx port mov dx,0cfc; set dx as data port in eax,dx;Receive the data into eax for the address we sent through dx port and eax,XXXXXX; Change the data or eax,XXXXXX; Change the data out eax,dx; Send back the modded data through dx port pop edx, pop eax popad ret; return to header last bit; use 8 bit checksum then install it with cbrom cbrom biosname.bin /isa filename.bin cheers:angel: :angel: miaoooow:cat: Share this post Link to post Share on other sites More sharing options...
cantankerous Posted July 16, 2004 Posted July 16, 2004 that is japanese russian to me! Its ok ill just use wpcrset for now. Share this post Link to post Share on other sites More sharing options...
AdvModDev Posted July 16, 2004 Posted July 16, 2004 Originally posted by cantankerous awesome thanks! I know the CPU disconnect was an option on my ABit board but not the DFI. Is this enabled in the background by default or does the DFI not have anything regarding the CPU Disconnect Function. Wondering if anyone can insert an ISA rom with these changes into a bios so we can have them without having to use wpcredit. cantank, "CPU Disconnect" has always been enabled by default on every single Oskar BIOS. Some of them use 1F and some use 9F. Like tictac said, either one will work...but nvidia has recommended that 9F be used with the NF2 Ultra 400 chips. You might also want to read up on "Tromoto's Halt Fix" thread concering the time out value. I'll see if I can dig it up but if you're using BIOS 6/19, then the fix has already been implemented. Concerning PCI Latency, listen to RGone. Concerning ISA ROMs, I don't know man. This makes the tweaks rather permanant...quite a hassle. Why not use just use WPCRSET? Share this post Link to post Share on other sites More sharing options...
tictac Posted July 16, 2004 Posted July 16, 2004 Originally posted by AdvModDev cantank, "CPU Disconnect" has always been enabled by default on every single Oskar BIOS. Some of them use 1F and some use 9F. Like tictac said, either one will work...but nvidia has recommended that 9F be used with the NF2 Ultra 400 chips. You might also want to read up on "Tromoto's Halt Fix" thread concering the time out value. I'll see if I can dig it up but if you're using BIOS 6/19, then the fix has already been implemented. Concerning PCI Latency, listen to RGone. Concerning ISA ROMs, I don't know man. This makes the tweaks rather permanant...quite a hassle. Why not use just use WPCRSET? AdvModDev... need your help can youy help me find this register 6) Normal Memory Setting *********************** PCI Bus# Dev# Func# Offset# - T(RAS) : - T(RCD-Read) : - T(RCD-Write) : - T(RP) : - CAS Latency : - T(RC) : - T(RFC) : if u can locate it i will try ask my freinds to build nforce2 tweaker with this all register like nf7vcore hasw stuff :nod: :nod: :nod: Share this post Link to post Share on other sites More sharing options...
cantankerous Posted July 16, 2004 Posted July 16, 2004 hmmm good info. I am using the 6/19 bios so I guess that timout value has been added however it wasn't mentioned in the release notes so I didn't know. What exactly does it do? As for PCI Latency I benched with 32 and 64 and found no difference whatsoever so whatever on that. I never knew CPU Disconnect was running either as that is something else that isn't user selectable via bios like the ABIT and I have never seen it in any release notes. Any reason why 9F is what Nvidia recommends over the 1F others are saying? Share this post Link to post Share on other sites More sharing options...
uwackme Posted July 16, 2004 Posted July 16, 2004 One side effect of CPUdisconnect being on by default...and not selectable... sometimes BOOTVIS hangs. So some people get windows to hang using bootvis to tweak/speedup XP and scratch thier head :nod: Yep, we in DFI land already have so much Oskar built in that perma-changes arent really needed. It's the ABit/ASUS people who need the alpha's, etc burned into the rom. Dont want to boot using too-tight settings and hope you get to the point where WCPRSET runs too loosen it up ;-) Im hoping one last act from Ticcy on ABit's would be a D10 old mickeypage special with alpha 6563356 and correct cpudisconnect, agp bus latency 255 and agp controller latency 96, all hard coded. In two versions... CPC ON and CPC OFF. I have my backup, and have 5 friends all with the NF7-S. Someday an Uber1007 tweak of the same for ASUS people. I know _I_ should be able to tweak these myself, I just havent managed to setup an environment that modbin, cbrom, etc were happy in.....hrrrumph. I'll try to setup a Win98 under VirtualPC as a place to make that all happen. Share this post Link to post Share on other sites More sharing options...
SAE Posted July 16, 2004 Posted July 16, 2004 Great info here Nice to see ya, AdvModDev... Hey Tictac, would be great if your friend could do that app for us... best would be if it could be made permanent uwackme... are ya sure you mean AGP controller latency to 96 and bus latency to 255??? :confused: Or is it meant the other way around?! I always have the controller latency set to 255, and the bus latency is on its default (32clocks). Share this post Link to post Share on other sites More sharing options...
tictac Posted July 18, 2004 Posted July 18, 2004 advmodev.. have u located the register yet? if u can locate it we can add it into the tools we still beta testing it... miaoooo.... :cat: Share this post Link to post Share on other sites More sharing options...
SAE Posted July 18, 2004 Posted July 18, 2004 Tictac, I checked that application, and I assume it's only to set the alpha ram timings? Erm, I found out the last timing is always set to 0 for me, and I cannot change it from windows... It should be set to 3. (bios) Weird. Share this post Link to post Share on other sites More sharing options...
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