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Couple WPCR Tweaks


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Offsets 3E and 3F aught to look like this really, on most bridges.

Specificly the south bridge and agp bridge, ie 006C and 01E8.

 

[3E:7]=Min Grant FF=63750ns 1B=6750ns 1C=7000ns

[3E:6]=19=6250ns 1A=6500ns 17=5750ns 18=6000ns

[3E:5]=15=5250ns 16=5500ns 13=4750ns 14=5000ns

[3E:4]=11=4250ns 12=4500ns 0F=3750ns 10=4000ns

[3E:3]=0D=3250ns 0E=3500ns 0B=2750ns 0C=3000ns

[3E:2]=09=2250ns 0A=2500ns 07=1750ns 08=2000ns

[3E:1]=05=1250ns 06=1500ns 03=750ns 04=1000ns

[3E:0]=01=250ns 02=500ns 00=No Requirements

 

[3F:7]=Max Latency FF=63750ns 1B=6750ns 1C=7000ns

[3F:6]=19=6250ns 1A=6500ns 17=5750ns 18=6000ns

[3F:5]=15=5250ns 16=5500ns 13=4750ns 14=5000ns

[3F:4]=11=4250ns 12=4500ns 0F=3750ns 10=4000ns

[3F:3]=0D=3250ns 0E=3500ns 0B=2750ns 0C=3000ns

[3F:2]=09=2250ns 0A=2500ns 07=1750ns 08=2000ns

[3F:1]=05=1250ns 06=1500ns 03=750ns 04=1000ns

[3F:0]=01=250ns 02=500ns 00=No Requirements

 

The names Min Grant and Max Latency could be redone later perhaps I dn.

 

In any case this is more accurate then say p2p ext timining or whatever.

Watch out for grant though, I said that 3f could be 00'ed, and if 08 and 1b can be 00'ed, this one is an exception for sure.

It acts alot like latency, but if you use to little you get hickups.

 

Mostly in hd access on the south bridge.

I have not benched them, I just played around with them in gtasa and farcry for the heck of it.

Some bridge you will notice has these 2 settings too, ie sound, usb etc.

They are locked in place though for the time being.

 

I got this from the txt I posted earlyier, there's more to get but I dn if it pertains to all the bridges or not.

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i have some really good news

 

To change from CAS 2.5 to CAS2.0 you must change this Offsets

 

PCI Bus#0 Dev#0 Func#1 Offset#

 

Offset 71 = 24 to 04

Offset 75 = 24 to 04

Offset 9A = 76 to 65

Offset A0 = 6A to 2A

Offset A8 = 6A to 2A

Offset B0 = 6A to 2A

Offset F9 = 46 to 45

 

Note: Offset F9 must be the LAST offset changed

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NoOne, thanks a mil' dude :D.

 

I totally forgot about cas.

I have a prob where I can drop from cas3 to cas2 without probs, even at 266mhz x2 fsb.

But..., I cannot setup the bios at cas2, I must doit after I boot.

I figuered it was some memory issue thing with this bios, probably was'nt meant for tcc5 memory, and the fact that I have 2 totally diffrent sticks.

 

So I've seen it in memtest, but big deal.

some of those offsets locked me right up but some did'nt ;).

 

Pay attention to offsets: A0, A8, B0 and B8.

Notice 4 of them?, that's for each of the 4 banks.

I also noticed that 3a is cas3, and 2a is cas2.

 

Sandra does'nt read this back correctly, but everest does.

I have'nt benched it yet, nor took it to S&M(that's next).

Anyways I think these 4 are the cas, the other have somehting to do with what the bios does at those timings.

Those others must be the reason why I can't boot correctly at cas2 and cas2.5.

Something else to map down the road :).

 

 

Really this is cool because if we really wanted to, we can setup a diff cas latency for each stick :D.

Nice find NoOne :D.

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I apperently had those a0,a8,b0 and b8 regs listed allready in pcr, the others not really.

 

Those 4 offsets are probably dummies, ie fakes.

I have 6a listed for cas2.5, 2a for cas2, 3a for cas3, I did this some time ago apperently.

I can do 1a, 0a.

No speed diffrences at all between any of the settings I think so...

 

Cas must be in one of the other offsets that NoOne listed off.

 

Btw, seems all programs, even sandra and wcpuid, etc use those 4 above fake offsets for reading the cas value.

So prime screens could be faked in regard to cas latency.

 

Memtest is probably the same exact way, not setting up cas at all.

 

 

Offtopic but here's another goodie.

tREF, for about any mobo out there, I dn care if it's intel or amd, it should work.

If it does'nt, that means you are defently not runing a ibm compatible.

 

This is'nt for wpcredit, it's nasm.

 

;;; Equates

 

TMR_8253_CH0 EQU 40H

TMR_8253_CH1 EQU 41H

TMR_8253_CH2 EQU 42H

TMR_8253_CONTROL EQU 43H

 

 

;;; Write [tREF]

 

TMR_8253_CH1_W2

 

push ax

 

mov al,01010100B ;Control (54h)

out TMR_8253_CONTROL,al

 

;mov al,0x02 ;Port, Low Address, 1.6761906422131683715900101384391 µs

;mov al,0x60 ;Port, Low Address, 1.6761906422131683715900101384391 µs

mov al,0xC0 ;Port, Low Address, 1.6761906422131683715900101384391 µs

;mov al,0xF9 ;Port, Low Address, 1.6761906422131683715900101384391 µs

out TMR_8253_CH1,al

 

pop ax

 

ret

 

;;;

 

The comments on some of the values are incorrect of course, I'm to lazy.

02 is my absolute lowest 266 stable, or bootup for that matter.

f9 was the highest I've tried but I left it on c0 for now.

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