fscussel Posted January 24, 2006 Posted January 24, 2006 WOW, thanks man, that's exactly what I was looking for !!! Share this post Link to post Share on other sites More sharing options...
syar2003 Posted January 24, 2006 Posted January 24, 2006 You're welcome Just take note of the trial period of it . (mine is expired now ,but I can still make readouts) Share this post Link to post Share on other sites More sharing options...
fscussel Posted January 27, 2006 Posted January 27, 2006 ok, here it shows most of the values in some strange way, not one digit numbers, why is that? Share this post Link to post Share on other sites More sharing options...
syar2003 Posted January 27, 2006 Posted January 27, 2006 You need to set it to HTML report (save as). Share this post Link to post Share on other sites More sharing options...
fscussel Posted January 27, 2006 Posted January 27, 2006 MANUFACTURING DESCRIPTION Manufacturer’s JEDEC ID Code: G-Skill Intl Module Manufacturing Location: 00h Module Part Number: FX Module Revision Code: 0000h Module Manufacturing Date: Not Implemented Module Serial Number: 00000000h LEGITIMATE ARCHITECTURES Fundamental Memory Type: DDR SDRAM DIMM configuration type: Non-ECC/Parity Number of Row Addresses: 13 Number of Column Addresses: 10 Number of DIMM Banks: 2 Module Bank Density: 256 MB Number of Banks on SDRAM Device: 4 Module Data Width: 64 bits Primary SDRAM Width: x8 Error Checking SDRAM Width: N/A Voltage Interface Level: SSTL 2.5V Refresh Rate/Type: 7.8 us Self Refresh DDR SDRAM DIMM Height: N/A TIMING SPECIFICATIONS Burst Lengths Supported: 2, 4, 8 CAS# Latencies Supported (tCL): 2T CS# Latency: 0T WE# Latency (Write Delay): 1T Cycle time at Max CAS Latency: 5.0 ns SDRAM Access from Clock (tAC): 0.65 ns Minimum Clock Cycle at tCL = X - 0.5: 0.0 ns Max Data Access Time at tCL = X - 0.5 (tAC): 0.00 ns Minimum Clock Cycle at tCL = X - 1: 0.0 ns Max Data Access Time at CL = X - 1 (tAC): 0.00 ns Minimum Active to Precharge Time (tRAS): 25.0 ns Minimum RAS to CAS delay (tRCD): 10.0 ns Minimum Row Precharge Time (tRP): 10.0 ns Min Active to Active/Auto Refresh Time (tRC): 55.0 ns Min Auto Ref to Active/Auto Refresh (tRFC): 70.0 ns Min Row Active to Row Active delay (tRRD): 10.0 ns Addr and CMD Input Setup Time Before Clock: 0.60 ns Addr and CMD Input Hold Time After Clock: 0.60 ns Data Input Setup Time Before Clock: 0.40 ns Data Input Hold Time After Clock: 0.40 ns Device Max device cycle time (tCKmax): 10.0 ns Max skew between DQS and DQ signals: 0.40 ns Max Read Data Hold Skew Factor: 0.50 ns Back-to-Back Random Col Access (tCCD): 1T SPD PROTOCOL Number of bytes written into SPD: 128 Total number of bytes of SPD: 256 SPD Revision: 0.0 Checksum for Bytes 0-62: 53h SUMMARY SPECIFICATION Module Type: DDR SDRAM PC3200 (DDR400) Module Size: 512 MB Frequency tCL tRCD tRP tRAS tRC tRFC tRRD 200 MHz 2,0 2 2 5 11 14 2 ------------------------------------------------------------------------ what I meant is those damn ns numbers, I want single number just like it appears in the bios?? Share this post Link to post Share on other sites More sharing options...
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