omga14 Posted May 10, 2005 Posted May 10, 2005 DFI LANPARTY UT 250gb Tic Tac Bios AMD Athlon 64 3400+ Newcastle Processor Model ADA3400AEP4AX - CBAZC 0503 stepping 512MB Corsair XMS PC3200C2v2.2 CH-5 @ DDR438 ASUS V9999GT/TD/256M Geforce 6800GT 256MB, 71.89WQHL Drivers - 410/1130 Western Digital Caviar SE WD1600JB 160GB 7200 RPM 8M Cache IDE Ultra ATA100 MSI Dragonwriter 48x24x48 CD Burner OCZ 520w Powerstream Adjstable Zalman CNPS7000-AlCu CPU Cooler * * Genie BIOS Settings: FSB Bus Frequency - 219 FSB AGP Bus Frequency - 70mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - 4 CPU/FSB Frequency Ratio - 12 CPU VID Control - 1.350v CPU VID Special Control - Avove VID * 123% LDT Voltage Control - auto Chip Set Voltage Control - 1.60v AGP Voltage Control - 1.70v DRAM Voltage Control - 3.40v DRAM Configuration Settings: DRAM Frequency Set - 200 (DRAM/FSB:1/01) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 1.5 RAS# to CAS# delay (Trcd) - 02 Bus Clocks Min RAS# active time (Tras) - 0 Bus Clocks Row precharge time (Trp) - 02 Bus Clocks Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - 13 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 01 Bus Clocks Read to Write delay (Trwt) - 01 Bus Clocks Refresh Period (Tref) - 3072 Cycles Write CAS Latency (Twcl) - 1 clk DRAM Bank Interleave - Enabled DQS Skew Control - Increase DQS Skew Value - 64 DRAM Drive Strength - Level 1 DRAM Data Drive Strength - Level 1 Max Async Latency - 6ns Read Preamble Time - 5ns IdleCycle Limit - 16 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(8 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51: http://www.angrygames.com/ocdb/omga14/omga14-1.jpg 3dMark2003: 3dMark2005: Aquamark 3d: ========== short description: 219x12 @ 2623Mhz, 1.350v + 123% 1.5-2-2-0 @ 3.3v vdimm BIOS Version = 10/15/2004 Share this post Link to post Share on other sites More sharing options...
Rabbi Posted May 15, 2005 Posted May 15, 2005 DFI LANPARTY UT 250gb Bios: 4/15 Beta 4.0vDimm Tictac modded AMD64 Mobile 3400+ Clawhammer 2x512MB OCZ VX Gold PC3200 (Winbond CH-UTT) ATI BBATI Radeon 9800 Non-Pro (Not modified at all, other than VGA Silencer) 2x Seagate 80GB SATA (RAID 0 on SATA3 & SATA4) + 1x Seagate 60GB ATA100 "The Oldest CDRW Drive On Planet Earth" (LG 8x Writer) PC Power & Cooling 510w Deluxe (3.3vRail modded to 3.84v unloaded) Thermalright XP-120 (Mounting bracket shaved down to fit mobile) + 120mm Thermaltake Fan Genie BIOS Settings (Daily): FSB Bus Frequency - 255 FSB AGP Bus Frequency - 67mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - 3 CPU/FSB Frequency Ratio - 10 CPU VID Control - 1.50v CPU VID Special Control - Avove VID * 110% Chip Set Voltage Control - 1.60v AGP Voltage Control - 1.50v DRAM Voltage Control - 3.2v DRAM Configuration Settings (Daily): DRAM Frequency Set - 200 (DRAM/FSB:1/01) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2 RAS# to CAS# delay (Trcd) - 02 Bus Clocks Min RAS# active time (Tras) - 8 Bus Clocks Row precharge time (Trp) - 02 Bus Clocks Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - 15 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 02 Bus Clocks Refresh Period (Tref) - 3072 Cycles Write CAS Latency (Twcl) - 1 clk DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Level 2 Max Async Latency - 7ns Read Preamble Time - 5ns IdleCycle Limit - 16 Cycles Dynamic Counter - Disable R/W Queue Bypass - 8 x Bypass Max - 04 x 32 Byte Granularity - Disable(8 Bursts) DRAM Configuration Settings (Max Overclock): See Screenshots for A64 Tweaker reference... timings vary too much from benchmark to benchmark RESULTS My personal best 3DMark'01 with unmodded 9800non-pro (10x268 2x512 2-2-2) http://www.xtremesystems.org/forums/attach...tid=30063&stc=1 Everest Memory Latency (10x270 2x512 2-2-2) http://www.xtremesystems.org/forums/attach...tid=30064&stc=1 Everest Memory Read (10x270 2x512 2-2-2) http://www.xtremesystems.org/forums/attach...tid=30065&stc=1 Everest Memory Write (10x270 2x512 2-2-2) http://www.xtremesystems.org/forums/attach...tid=30066&stc=1 31s SuperPI 1MB (10x270 2x512 2-2-2) http://www.xtremesystems.org/forums/attach...tid=30067&stc=1 SuperPI 1MB @ 9x275 1x512 2-2-2 http://www.xtremesystems.org/forums/attach...tid=30393&stc=1 3DMark'01 @ 9x275 1x512 2-2-2 http://www.xtremesystems.org/forums/attach...tid=30392&stc=1 My personal Everest Memory Read Bandwidth record (9x280 1x512 2-2-2) http://www.xtremesystems.org/forums/attach...tid=30394&stc=1 SuperPI 32MB @ 9x270 2x512 2-2-2 http://www.xtremesystems.org/forums/attach...tid=30401&stc=1 ========== short description: 255x10 @ 2550Mhz, 1.5v + 110% 2-2-2-8 @ 3.2v vdimm (1:1) Window XP PRO SP2 Share this post Link to post Share on other sites More sharing options...
Angry_Games Posted May 18, 2005 Posted May 18, 2005 DFI LANPARTY UT 250gb 4/15/2005 Beta BIOS AMD Sempron 2800+ "Paris" Processor Model SDA2800BABOX - (SDA2800AI03B0 CBBLE 0503EPMW) 2x256MB Buffalo BH-5 DDR Sapphire Radeon 9500NP modded to 9700Pro, Omega 2.6.25a (CAT5.4) - 310/310 Maxtor DiamondMax Plus 9 6Y160P0 160GB 7200 RPM IDE Ultra ATA133 Hard Drive ASUS CD-S520/A5 Black IDE CD-ROM Drive FSP Group (Fortron Source) FSP530-60GNA ATX 530W Power Supply THERMALTAKE Silent Boost 80mm Ball Cooling Fan * * * * Genie BIOS Settings: FSB Bus Frequency - 300 AGP Bus Frequency - 67mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - Auto CPU/FSB Frequency Ratio - Auto (8x default) CPU VID Control - 1.300v CPU VID Special Control - Avove VID * 113% Chip Set Voltage Control - 1.60v AGP Voltage Control - 1.60v DRAM Voltage Control - 3.10v DRAM Configuration Settings: DRAM Frequency Set - 150 (DRAM/FSB:3/04) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.0 RAS# to CAS# delay (Trcd) - 02 Bus Clocks Min RAS# active time (Tras) - 5 Bus Clocks Row precharge time (Trp) - 02 Bus Clocks Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - 17 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - 4708 Cycles Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Level 4 DRAM Data Drive Strength - Auto Max Async Latency - Auto Read Preamble Time - Auto IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(8 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51: http://www.angrygames.com/pics/nf3/nf3_e0-1.jpg 3dMark2003: 3dMark2005: Aquamark 3d: Everest Home Edition - Memory Writes: http://www.angrygames.com/pics/nf3/nf3_e0-5.jpg Everest Home Edition - Memory Latency: http://www.angrygames.com/pics/nf3/nf3_e0-6.jpg ========== short description: 300*8 @ 2402Mhz, 1.300v + 113% 2-2-5-2 @ 3.1v vdimm BIOS VERSION: 4/05/2005 beta Share this post Link to post Share on other sites More sharing options...
Angry_Games Posted May 19, 2005 Posted May 19, 2005 DFI LANPARTY UT 250gb 4/15/2005 Beta BIOS AMD Sempron 2800+ "Paris" Processor Model SDA2800BABOX - (SDA2800AI03B0 CBBLE 0503EPMW) 1x512MB Centon TCCD (brainpower pcb) DDR ATI X800 Pro 256MB AGP, Omega 2.6.25a (CAT5.4) - 501/501 Maxtor DiamondMax Plus 9 6Y160P0 160GB 7200 RPM IDE Ultra ATA133 Hard Drive ASUS CD-S520/A5 Black IDE CD-ROM Drive FSP Group (Fortron Source) FSP530-60GNA ATX 530W Power Supply THERMALTAKE Silent Boost 80mm Ball Cooling Fan * * * * Genie BIOS Settings: FSB Bus Frequency - 333 AGP Bus Frequency - 67mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - X 3.0 CPU/FSB Frequency Ratio - Auto CPU VID Control - 1.300v CPU VID Special Control - Avove VID * 123% Chip Set Voltage Control - 1.90v AGP Voltage Control - 1.70v DRAM Voltage Control - 3.30v DRAM Configuration Settings: DRAM Frequency Set - 166 (DRAM/FSB:5/06) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 04 Bus Clocks Min RAS# active time (Tras) - 08 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - 17 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 03 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - 4708 Cycles Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Decrease Skew DQS Skew Value - 0 DRAM Drive Strength - Level 1 Max Async Latency - 08.0 Nano Seconds Read Preamble Time - 06.0 Nano Seconds IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - Auto Bypass Max - 07 x 32 Byte Granularity - Disable(8 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51: http://www.angrygames.com/ocdb/angry/sempr...mpron2660-1.jpg 3dMark2003: 3dMark2005: Aquamark 3d: AMD Nbench ========== short description: 333x8 @ 2660Mhz, 1.300v + 123% 2.5-4-8-3 @ 3.3v vdimm previous OCDB entry here (2600Mhz): http://www.angrygames.com/ocdb/angry/sempron2600/ Share this post Link to post Share on other sites More sharing options...
Hemidare Posted May 20, 2005 Posted May 20, 2005 DFI LANPARTY UT 250gb Bios 5/04/2005 AMD Athlon 64 3000+ Newcastle 2x512 OCZ Platinum rev 2.0 3200@440mhz 2-2-5-2-1t Stepping=ADA3000AEP4AX-CBAEC O423SPMW BFG 6800GT OC 256mb 256bit memory interface, 71.89WQHL Drivers - 370/1000 Western Digital RAPTOR 36.7gig Sata150 Lg Dvd burner Antec Neopower 480watt XP-120 Thermalright * * Genie BIOS Settings: FSB Bus Frequency - 220 FSB AGP Bus Frequency - 66mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - Auto CPU/FSB Frequency Ratio - 10 CPU VID Control - 1.275v CPU VID Special Control - Avove VID * 126% Chip Set Voltage Control - 1.60v AGP Voltage Control - 1.50v DRAM Voltage Control - 2.9v DRAM Configuration Settings: DRAM Frequency Set - 200 (DRAM/FSB:1/01) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.0 RAS# to CAS# delay (Trcd) - 02 Bus Clocks Min RAS# active time (Tras) - 5 Bus Clocks Row precharge time (Trp) - 02 Bus Clocks Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - 10 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 01 Bus Clocks Read to Write delay (Trwt) - 01 Bus Clocks Refresh Period (Tref) - 3120 Cycles Write CAS Latency (Twcl) - 1 clk DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Auto Max Async Latency - Auto Read Preamble Time - Auto IdleCycle Limit - Auto Dynamic Counter - Auto R/W Queue Bypass - Auto Bypass Max - Auto 32 Byte Granularity - Auto ========== Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51: http://img150.echo.cx/img150/9190/stableoc7hj.jpg Aquamark03 3dmark 2003 3dmark 2005 Everest Home Edition - Memory Read Everest Home Edition - Memory Write Everest Home Edition - Memory Latency ========== short description: 220x10 @ 2200Mhz, 1.275v + 126% 2-2-2-5 @ 2.9v vdimm Share this post Link to post Share on other sites More sharing options...
Hemidare Posted May 21, 2005 Posted May 21, 2005 DFI LANPARTY UT 250gb Bios 5/04/2005 AMD Sempron 2800 PalermoStepping=SDA2800AI03BA CBBHD 0452MPMW 2x512 OCZ Platinum rev 2.0 3200@480mhz 2-3-3-5-1t Brainpower PCB's (B6U808) BFG 6800GT OC 256mb 256bit memory interface, 71.89WQHL Drivers - 370/1000 Western Digital RAPTOR 36.7gig Sata150 Lg Dvd burner Antec Neopower 480watt XP-120 Thermalright * * Genie BIOS Settings: FSB Bus Frequency - 300 FSB AGP Bus Frequency - 66mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - Auto CPU/FSB Frequency Ratio - 8 CPU VID Control - 1.350v CPU VID Special Control - Avove VID * 123% Chip Set Voltage Control - 1.80v AGP Voltage Control - 1.50v DRAM Voltage Control - 2.9v DRAM Configuration Settings: DRAM Frequency Set - 166 (DRAM/FSB:5/06) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.0 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 5 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - 10 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 01 Bus Clocks Read to Write delay (Trwt) - 01 Bus Clocks Refresh Period (Tref) - 3120 Cycles Write CAS Latency (Twcl) - 1 clk DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - 1 Max Async Latency - 7 ns Read Preamble Time - 6 ns IdleCycle Limit - 16 clks Dynamic Counter - Enabled R/W Queue Bypass - 8x Bypass Max - 4x 32 Byte Granularity - Disable ========== Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51: http://img218.echo.cx/img218/6427/palemostable0tb.jpg Aquamark03 3dmark 2003 3dmark 2005 ========== short description: 300x8 @ 2400Mhz, 1.350v + 123% 2-3-3-5 @ 2.9v vdimm Share this post Link to post Share on other sites More sharing options...
p0tter Posted May 22, 2005 Posted May 22, 2005 DFI LANPARTY UT 250Gb 4/15/2005 Beta Bios (Vantec NB) AMD Sempron 2800+ Processor OCZ 512MB DDR PC-3200 Enhanced Latency Platinum Revision 2 (TCC5-B6U808) (Slot-2) ATI Radeon 9700Pro (357/337) 2.6.25a Omega Western Digital Raptor 36GB (SATA-3) OCZ 420w Powerstream ZALMAN CNPS7000B-CU Genie BIOS Settings: FSB Bus Frequency - 310 FSB AGP Bus Frequency - 67mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - Auto CPU/FSB Frequency Ratio - 8x (locked) CPU VID Control - 1.475v CPU VID Special Control - Above VID * 104% LDT Voltage Control - Auto Chip Set Voltage Control - 1.80v AGP Voltage Control - 1.60v DRAM Voltage Control - 2.90v DRAM Configuration Settings: DRAM Frequency Set - 200 (DRAM/FSB:1/01) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 04 Bus Clocks Min RAS# active time (Tras) - 07 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 12 Bus Clocks Row refresh cyc time (Trfc) - 14 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 03 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - 4708 Cycles Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Increase DQS Skew Value - 255 DRAM Drive Strength - Level 1 Max Async Latency - Auto Read Preamble Time - Auto IdleCycle Limit - 016 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(8 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.28: 20728 3dMark2003: 5898 http://public.fotki.com/timothywangerin/oc...dmark_2003.html 3dMark2005: 2441 http://public.fotki.com/timothywangerin/oc...dmark_2005.html Aquamark 3d: 47,135 http://public.fotki.com/timothywangerin/oc...rk3_stable.html Everest 1.51 Read: 4797 http://public.fotki.com/timothywangerin/oc...erest_read.html Everest 1.51 Write: 1933 http://public.fotki.com/timothywangerin/oc...rest_write.html Everest 1.51 Latency: 37.0ns http://public.fotki.com/timothywangerin/oc...verest_lat.html Sandra Memory: http://public.fotki.com/timothywangerin/oc...dra_memory.html Sandra CPU: http://public.fotki.com/timothywangerin/oc...sandra_cpu.html A64 Tweaker: http://public.fotki.com/timothywangerin/oc...64_tweaker.html ========== short description: 310x8 @ 2483Mhz, 1.475v + 104% 2.5-4-3-7 @ 2.9v vdimm (1:1) Window XP PRO SP2 Share this post Link to post Share on other sites More sharing options...
catkicker Posted May 28, 2005 Posted May 28, 2005 DFI LANPARTY UT 250gb 10/15 - 4.0 vdimm Bios AMD Athlon 64 3200+ Newcastle Processor Model ADA3200AEP 4AX CBAEC 0434RPMW stepping 512MB OCZ EL Platinum Revision DDR SDRAM Unbuffered DDR 400 (PC 3200)Dual Channel Kit PNY Technpology Geforce 6800 128MB 16x1,6vp unlocked, 76.45 WQHL Drivers - 340/750 Seagate Barracuda 7200.7 SATA NCQ ST380017AS 80GB 7200 RPM 8MB Cache Serial ATA150 MegaSTOR 6-in-1 16X Double Layer Internal DVD±R/±RW Antec TruePower 2.0 TP2-550 EPS12V ATX12V 550W Power Supply 115/230 V * * Genie BIOS Settings: FSB Bus Frequency - 225 FSB AGP Bus Frequency - 66mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - x3 CPU/FSB Frequency Ratio - 11 CPU VID Control - 1.450v CPU VID Special Control - 110% Chip Set Voltage Control - 1.60v AGP Voltage Control - 1.70v DRAM Voltage Control - 2.8v DRAM Configuration Settings: DRAM Frequency Set - 180 (DRAM/FSB:9/10) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 04 Bus Clocks Min RAS# active time (Tras) - 10 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 14 Bus Clocks Row refresh cyc time (Trfc) - 16 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 03 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - 0648 Cycles Write CAS Latency (Twcl) - auto clk DQS Skew Control - decrease DQS Skew Value - 0 DRAM Drive Strength - auto Max Async Latency - 08.0ns Read Preamble Time - 06.0ns IdleCycle Limit - auto Dynamic Counter - Disable R/W Queue Bypass - 04 x Bypass Max - 04 x 32 Byte Granularity - Disable(8 Bursts) ========== PRIME95 & 3DM2001 http://img235.echo.cx/my.php?image=p953dm018uk.jpg aquamark03 http://img272.echo.cx/my.php?image=am34gg.jpg 3DM03 http://img281.echo.cx/my.php?image=3dm034eg.jpg 3DM05 http://img281.echo.cx/my.php?image=3dm051fz.jpg EVEREST MEM. LATENCY http://img281.echo.cx/my.php?image=everestmemlat4pe.jpg EVEREST MEM. READ http://img281.echo.cx/my.php?image=everestmemread6ga.jpg EVEREST MEM. WRITE http://img281.echo.cx/my.php?image=everestmemwrite0tn.jpg short description: 225x11 @ 2475Mhz, 1.450v + 110% 2x512 2.5-4-3-10 @ 2.8v vdimm Share this post Link to post Share on other sites More sharing options...
OldGuy Posted June 15, 2005 Posted June 15, 2005 DFI LANPARTY UT 250gb 5/04/05 official bios AMD Sempron 3100+ Palermo Processor Model ADA3100AI03BA - CBBHD D452APQW stepping 1024 OCZ EL PC-4800 Platinum (512 x 2) TCCD ATI Radeon x850xt 256MB Omega 2.6.25a with RadLinker 596/1202 Maxtor Diamondmax Plus 9 6Y080P0 80GB 7200 RPM 8M Cache IDE Ultra ATA133 RAID 0 X2 NEC ND-3520A DVD-RRW Enermax EG701AX-VE SFMA 600W Thermalright XP-90 HSF with Zalman ZM-F2 53CFM Fan * * Genie BIOS Settings: FSB Bus Frequency - 316 FSB AGP Bus Frequency - 67mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - 3 CPU/FSB Frequency Ratio - 8 CPU VID Control - 1.40v CPU VID Special Control - Avove VID * 123% Chip Set Voltage Control - 1.90v AGP Voltage Control - 1.70v DRAM Voltage Control - 3.0v DRAM Configuration Settings: DRAM Frequency Set - 166 (DRAM/FSB:5/06) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 04 Bus Clocks Min RAS# active time (Tras) - 10 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 14 Bus Clocks Row refresh cyc time (Trfc) - 16 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 03 Bus Clocks Write to Read delay (Twtr) - 01 Bus Clocks Read to Write delay (Trwt) - 04 Bus Clocks Refresh Period (Tref) - 3072 Cycles Write CAS Latency (Twcl) - 1 clk DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Level 2 Max Async Latency - 8ns Read Preamble Time - 5.5ns IdleCycle Limit - 128 Cycles Dynamic Counter - enable R/W Queue Bypass - 8 x Bypass Max - 4 x 32 Byte Granularity - Disable(8 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51: http://img269.echo.cx/my.php?image=ocdbpic61205v13ez.jpg 3dMark2003: http://img234.echo.cx/my.php?image=3dm03140360lc.jpg 3dMark2005: http://img234.echo.cx/my.php?image=3dm0568027wu.jpg Aquamark 3d: http://img234.echo.cx/my.php?image=am3759106sz.jpg Everest Read: http://img61.echo.cx/my.php?image=everestread3yk.jpg Everest Write: http://img61.echo.cx/my.php?image=everestwrite8ch.jpg Everest Latency: http://img61.echo.cx/my.php?image=everestlatency5mk.jpg Sandra Bandwidth: http://img61.echo.cx/my.php?image=sandrambw7fg.jpg ========== short description: 316 x 8 @ 2528Mhz, 1.400v + 123% 2.5-4-3-10 @ 3.0v vdimm Share this post Link to post Share on other sites More sharing options...
psy^ Posted July 3, 2005 Posted July 3, 2005 DFI Lanparty nf3 ut250GB with 05-04 BIOS Newcastle 3000+ (ADA3000AEP4AX LBAZC0512APDW) Thermalright xp-120 with 120mm SilenX fan 2x 512MB Corsair 3200XL rev1.2 (TCCD) nVidia 6800 128MB (12 vertex units, 6 pixel units) Antec 500w SmartPower 2.0 Windows XP x64 = = = = = Genie BIOS Settings: FSB Bus Frequency - 277 FSB AGP Bus Frequency - 67mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - 2.5 CPU/FSB Frequency Ratio - 9 CPU VID Control - 1.55v CPU VID Special Control - Above VID * 110% Chip Set Voltage Control - 1.90v AGP Voltage Control - 1.60v DRAM Voltage Control - 2.80v DRAM Configuration Settings:: DRAM Frequency Set - 183 (DRAM/FSB:9/10) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 10 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - 14 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 03 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - 4078 Cycles Write CAS Latency (Twcl) - 1 clk DRAM Bank Interleave - Enabled DQS Skew Control - Increase DQS Skew Value - 255 DRAM Drive Strength - Level 2 Max Async Latency - 8ns Read Preamble Time - 5ns IdleCycle Limit - 16 Cycles Dynamic Counter - Disable R/W Queue Bypass - 8 x Bypass Max - 4 x 32 Byte Granularity - Disable(8 Bursts) = = = = = Prime95 + 3dMark2001SE + CPU-Z 1.29: Everest Memory Read: 3DMark03: 3DMark05: Aquamark03: = = = = = Short Description: 277x9 @ 2493Mhz, 1.550v + 110% 2-3-3-10-1T 2.8v, 9:10 @ 249.3Mhz :nod: :shake: Share this post Link to post Share on other sites More sharing options...
THunDA Posted July 29, 2005 Posted July 29, 2005 DFI LANPARTY UT 250gb 5/04/05 (4v vdimm Tic Tac Bios) AMD Athlon 64 3400+ Mobile ClawHammer Processor Model - 0449 stepping 2x 512mb Mushkin PC3500 lev2 BH5 Saphire X800XT-PE 256MB, Cat 5.7's - Stock clocks 2x Seagate 80gig sata drives in Raid0 HP cdrw Model=9100 PC Power and Cooling Turbo Cool 510 psu with sense mods ThermalRight SLK948 with 92mm Tornado * * Genie BIOS Settings: FSB Bus Frequency - 246 AGP Bus Frequency - 67mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - 3 CPU/FSB Frequency Ratio - 11 CPU VID Control - 1.35v CPU VID Special Control - Avove VID * 126% Chip Set Voltage Control - 1.70v AGP Voltage Control - 1.50v DRAM Voltage Control - 3.20v DRAM Configuration Settings: DRAM Frequency Set - 200 (DRAM/FSB:1/01) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.0 RAS# to CAS# delay (Trcd) - 02 Bus Clocks Min RAS# active time (Tras) - 8 Bus Clocks Row precharge time (Trp) - 02 Bus Clocks Row Cycle time (Trc) - 09 Bus Clocks Row refresh cyc time (Trfc) - 14 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 01 Bus Clocks Read to Write delay (Trwt) - 02 Bus Clocks Refresh Period (Tref) - 3120 Cycles Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Level 1 Max Async Latency - 7ns Read Preamble Time - 5ns IdleCycle Limit - 64 Cycles Dynamic Counter - Enable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(8 Bursts) ========== Prime95 + 3dMark2001SE + 2x CPU-Z + MBM : http://img292.imageshack.us/img292/6061/ocdb75410zm.jpg 3dMark2003 + Everest : http://img292.imageshack.us/img292/9788/ocdb75422mn.jpg 3dMark2005: Aquamark 3d: ========== short description: 246x11 @ 2706Mhz, 1.350v + 126% 2.0-2-8-2 @ 3.2v vdimm Share this post Link to post Share on other sites More sharing options...
OldGuy Posted July 29, 2005 Posted July 29, 2005 DFI LANPARTY UT 250gb Tic Tac Bios 504 AMD Athlon 64 3000+ Newcastle Processor Model ADA3000AEP4AX - LBAZC 0445XPMW stepping - NAKED PDP Patriot XBLK 2X256 - Slots one and three eVga GeForce 6800 256MB - Omega 1.6693 Drivers - 341/732 Maxtor Diamondmax Plus 9 6Y080P0 80GB 7200 RPM 8M Cache IDE Ultra ATA133 OCZ 420w Powerstream Thermalright XP-90 with Zalman ZM-F2 53CFM Fan * * Genie BIOS Settings: FSB Bus Frequency - 250 FSB AGP Bus Frequency - 67mhz Clock Spread Spectrum - Disabled LDT Downstream Width - Auto LDT Upstream Width - Auto LDT/FSB Frequency - 2.5 CPU/FSB Frequency Ratio - 10 CPU VID Control - 1.50v CPU VID Special Control - Above VID * 123% Chip Set Voltage Control - 1.70v AGP Voltage Control - 1.60v DRAM Voltage Control - 2.90v DRAM Configuration Settings: DRAM Frequency Set - 200 (DRAM/FSB:1/01) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 04 Bus Clocks Min RAS# active time (Tras) - 07 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 11 Bus Clocks Row refresh cyc time (Trfc) - 13 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 02 Bus Clocks Refresh Period (Tref) - 3072 Cycles Write CAS Latency (Twcl) - 1 clk DRAM Bank Interleave - Enabled DQS Skew Control - decrease DQS Skew Value - 64 DRAM Drive Strength - Level 1 Max Async Latency - 7ns Read Preamble Time - 5.5ns IdleCycle Limit - 16 Cycles Dynamic Counter - Enable R/W Queue Bypass - 08 x Bypass Max - 04 x 32 Byte Granularity - Auto ========== Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51: http://img193.imageshack.us/my.php?image=newc728058ns.jpg 3dMark2003: 3dMark2005: Aquamark 3d: Sandra: Everest Write: Everest Latency: ========== short description: 250x10 @ 2500Mhz, 1.50v + 123% 2.5-4-3-7 @ 2.9v vdimm Share this post Link to post Share on other sites More sharing options...
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