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Socket 939 Overclocking Database

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DFI LANPARTY UT nF4 ULTRA-D (704-2BTA BIOS)

 

AMD64 SAN DIEGO 3700+ KAB2E 0602GPEW

 

Thermaltake Bigwater 745 WC kit

 

2 X 1024 OCZ PC4000 (OCZ5002048ELGEGXT-K)

 

BFG GeForce 6600GT, 525/1050 9.931 drivers

 

Samsung SP1203N 120GB 7200RPM ATA hdd

 

AOpen DUW1616 16X DVD +/-R, 4X Dual Layer

 

OCZ MODSTREAM 520w Power Supply

 

 

 

*

*

 

 

*

*

 

==========

 

[b]Genie BIOS Settings:[/b]

[color=red]

FSB Bus Frequency.............................  -  305

LDT/FSB Frequency Ratio.......................  -  3

CPU/FSB Frequency Ratio.......................  -  X 10

PCI eXpress Frequency.........................  -  100Mhz



CPU VID StartUp Value.........................  -  1.475v



CPU VID Control...............................  -  1.475v

CPU VID Special Control.......................  -  Above VID * 113%

LDT Voltage Control...........................  -  1.30v 

Chip Set Voltage Control......................  -  1.50v

DRAM Voltage Control..........................  -  3.10v[/color]



[b]DRAM Configuration Settings:[/b]

[color=red]

DRAM Frequency Set............................  -  166=dRAM/FSB: 05/06

Command Per Clock (CPC).......................  -  Auto 

CAS Latency Control (Tcl).....................  -  3.0

RAS# to CAS# delay (Trcd).....................  -  3.0

Min RAS# active time (Tras)...................  -  07

Row precharge time (Trp)......................  -  02

Row Cycle time (Trc)..........................  -  07 Bus Clocks

Row refresh cyc time (Trfc)...................  -  17 Bus Clocks

Row to Row delay (Trrd).......................  -  02 Bus Clocks

Write recovery time (Twr).....................  -  02 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  3120 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

DRAM Drive Strength...........................  -  Auto

DRAM Data Drive Strength......................  -  Auto

Max Async Latency.............................  -  08.0 Nano Seconds

DRAM Response Time............................  -  Normal

Read Preamble Time............................  -  07.0 Nano Seconds

IdleCycle Limit...............................  -  008 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  07 x

32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z:

 

wcoc1.jpg

 

 

3dMark2003 + Everest Mem Read:

 

wcoc2read.jpg

 

 

3dMark2005 + Everest Mem Latency:

 

wcoc3lat.jpg

 

 

 

3dMark 2006 + Mem Write:

 

wcoc4wri.jpg

 

 

 

Aquamark:

 

wcoc5aqua.jpg

 

 

 

==========

 

 

 

short description:

305x10 @ 3050Mhz, 1.650v cpu

3-3-2-7 @ 3.10v vdimm 29 idle 44 load

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DFI LANPARTY nF4 SLI-DR (4/06BTA BIOS)

 

AMD Opteron 165 CCBBE 0615DPMW

 

2x512MB Kingston HyperX PC3200 KHX3200K2/1G (BH-5)

 

XFX 7800GTX 256MB, 91.47 drivers, stock clock/mem

 

2x Hitachi 160GB SATA hdd (8MB cache)

 

Lite-On SOHW-1213S

 

OCZ PowerStream OCZ520ADJSLI ATX 520W Power Supply

 

==========

 

[b]Genie BIOS Settings:[/b]

[color=red]

FSB Bus Frequency.............................  -  320

LDT/FSB Frequency Ratio.......................  -  3x

CPU/FSB Frequency Ratio.......................  -  9x

PCI eXpress Frequency.........................  -  100Mhz



CPU VID StartUp Value.........................  -  Startup



CPU VID Control...............................  -  1.45V

CPU VID Special Control.......................  -  Auto

LDT Voltage Control...........................  -  1.20v 

Chip Set Voltage Control......................  -  1.5v

DRAM Voltage Control..........................  -  3.2v[/color]



[b]DRAM Configuration Settings:[/b]

[color=red]

DRAM Frequency Set............................  -  150=RAM/FSB:03/04

Command Per Clock (CPC).......................  -  Enable 

CAS Latency Control (Tcl).....................  -  2

RAS# to CAS# delay (Trcd).....................  -  2

Min RAS# active time (Tras)...................  -  6

Row precharge time (Trp)......................  -  2

Row Cycle time (Trc)..........................  -  13 Bus Clocks

Row refresh cyc time (Trfc)...................  -  16 Bus Clocks

Row to Row delay (Trrd).......................  -  03 Bus Clocks

Write recovery time (Twr).....................  -  03 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  3120 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

DRAM Drive Strength...........................  -  Auto

DRAM Data Drive Strength......................  -  Auto

Max Async Latency.............................  -  Auto

DRAM Response Time............................  -  Normal

Read Preamble Time............................  -  Auto

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  04 x

32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z + Everest 2.20:

 

http://www.weaveroffates.com/images/ocimages/DC-opty-320.jpg

 

 

3dMark2003:

 

3dm03-dc.jpg

 

 

3dMark2005:

 

3dm05-dc.jpg

 

 

 

3dMark 2006:

 

3dm06-dc.jpg

 

 

Aquamark 3:

 

http://www.weaveroffates.com/images/ocimages/aqua-dc.jpg

 

 

 

==========

 

 

 

short description:

320x11 @ 2880Mhz, Vcore 1.5v

2-2-6-2 @ 3.20v vdimm

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NOTE: OLD, I've got a 8800GTS that I've not done the tests on. Feb 07...I've got some new mem, watercooled now, Dec 06.

 

DFI LANPARTY NF4 Ultra-D (939 PCI-E SLI) 04/06/20006 BIOS

 

AMD Athlon64 X2 4800+ dual-core (Toledo)

 

Crucial Ballistix BL2KIT12864Z503.16TD1 (1GB x 2)PC4000(DDR500)

 

NVidia XFX 7900GTX 512MB Bios 5.71.22.12.15 , Forceware 91.47 drivers

 

Seagates, 3 each, 300GB SATA I & II, 8MB Cache, Non-Raid

 

NEC AD-7170A DVD-RW, firmware 1.O3 (This drive works well after installing nero 7.7.5.1, no more coasters!)

 

OCZ GameXStream 700W power supply

 

 

 

*

*

*

*

 

 

==========

 

 

[b]Genie BIOS Settings:[/b]
[color=red]
FSB Bus Frequency.............................  -  281
LDT/FSB Frequency Ratio.......................  -  3
CPU/FSB Frequency Ratio.......................  -  10
PCI eXpress Frequency.........................  -  100Mhz

CPU VID StartUp Value.........................  -  STARTUP

CPU VID Control...............................  -  1.30v
CPU VID Special Control.......................  -  +123%
LDT Voltage Control...........................  -  1.30v 
Chip Set Voltage Control......................  -  1.60v
DRAM Voltage Control..........................  -  2.60v[/color]


[b]DRAM Configuration Settings:[/b]
[color=red]
DRAM Frequency Set............................  - 200=RAM/FSB:01/01
Command Per Clock (CPC).......................  - Enabled 
CAS Latency Control (Tcl).....................  -  3
RAS# to CAS# delay (Trcd).....................  -  4
Min RAS# active time (Tras)...................  -  8
Row precharge time (Trp)......................  -  4
Row Cycle time (Trc)..........................  -  7 Bus Clocks
Row refresh cyc time (Trfc)...................  - 14 Bus Clocks
Row to Row delay (Trrd).......................  - 02 Bus Clocks
Write recovery time (Twr).....................  - 03 Bus Clocks
Write to Read delay (Twtr)....................  - 02 Bus Clocks
Read to Write delay (Trwt)....................  - 04 Bus Clocks
Refresh Period (Tref).........................  - 3072 Cycles
Odd Divisor...................................  - Disable
DRAM Bank Interleave..........................  - Enabled

DQS Skew Control..............................  -  Off
DQS Skew Value................................  -  0
DRAM Drive Strength...........................  -  Weak
DRAM Data Drive Strength......................  -  Level 4
Max Async Latency.............................  -  6
DRAM Response Time............................  -  Fast
Read Preamble Time............................  -  5
IdleCycle Limit...............................  -  256 Cycles
Dynamic Counter...............................  -  Disabled
R/W Queue Bypass..............................  -  16 x
Bypass Max....................................  -  07 x
32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

==========

 

 

Prime95 + 3dMark2001SE (35238) + CPU-Z + Everest 2.20:

 

3dmark2001124dec06rs9.th.png

 

 

3dMark2003 (22948):

 

3dmark2003124dec06yp6.png

 

 

3dMark2005 (11073):

 

3dmark2005124dec06ek5.png

 

 

3dMark2006 (6159):

 

3dmark2006124dec06zl8.png

 

 

AquaMark (113677):

 

aquamark324dec06na3.png

 

 

==========

 

 

 

short description:

281x10 @ 2812MHz, 1.55v (Default)

3-4-8-4 @ 2.60v vdimm

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DFI LANPARTY nF4 SLI-DR EXPERT(04/06-Official)

 

AMD Opteron 144 CAB1E 0604

 

2x512MB Patriot PC4800 (TCCD)

 

Evga GeForce 7900GT KO, 580/1760 91.33 drivers

 

250GB Seagate 7200.9 SATA hdd

 

SAMSUNG CDVD/RW Combo Drive

 

Silverstone 600watt Modular PSU

 

Thermalright XP-90 + Vantec Tornado 92mm

 

 

*

*

 

 

*

*

 

==========

 

[b]Genie BIOS Settings:[/b]
[color=red]
FSB Bus Frequency.............................  -  334
LDT/FSB Frequency Ratio.......................  -  Auto
CPU/FSB Frequency Ratio.......................  -  9
PCI eXpress Frequency.........................  -  100Mhz

CPU VID StartUp Value.........................  -  Auto

CPU VID Control...............................  -  1.40v
CPU VID Special Control.......................  -  +107%
LDT Voltage Control...........................  -  1.30v 
Chip Set Voltage Control......................  -  1.54v
DRAM Voltage Control..........................  -  2.92v[/color]

[b]DRAM Configuration Settings:[/b]
[color=red]
DRAM Frequency Set............................  -  200=RAM/FSB:01/01
Command Per Clock (CPC).......................  -  Disable 
CAS Latency Control (Tcl).....................  -  3
RAS# to CAS# delay (Trcd).....................  -  4
Min RAS# active time (Tras)...................  -  7
Row precharge time (Trp)......................  -  3
Row Cycle time (Trc)..........................  -  11 Bus Clocks
Row refresh cyc time (Trfc)...................  -  15 Bus Clocks
Row to Row delay (Trrd).......................  -  02 Bus Clocks
Write recovery time (Twr).....................  -  02 Bus Clocks
Write to Read delay (Twtr)....................  -  02 Bus Clocks
Read to Write delay (Trwt)....................  -  03 Bus Clocks
Refresh Period (Tref).........................  -  3120 Cycles
DRAM Bank Interleave..........................  -  Enabled

DQS Skew Control..............................  -  Auto
DQS Skew Value................................  -  0
DRAM Drive Strength...........................  -  Auto
DRAM Data Drive Strength......................  -  Auto
Max Async Latency.............................  -  Auto
DRAM Response Time............................  -  Normal
Read Preamble Time............................  -  Auto
IdleCycle Limit...............................  -  256 Cycles
Dynamic Counter...............................  -  Disable
R/W Queue Bypass..............................  -  16 x
Bypass Max....................................  -  07 x
32 Byte Granularity...........................  -  Disable(4 Bursts)
[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z:

 

http://i14.photobucket.com/albums/a306/nmt...0pics/1st-1.jpg

 

 

3dMark2003:

 

http://i14.photobucket.com/albums/a306/nmt...3d03-2small.jpg

 

 

3dMark2005:

 

http://i14.photobucket.com/albums/a306/nmt...3d05small-2.jpg

 

 

 

3dMark 2006:

 

http://i14.photobucket.com/albums/a306/nmt...s/3d06small.jpg

 

 

 

==========

 

 

 

short description:

334x9 @ 3006Mhz, 1.46v vcore

3-4-7-3 @ DDR668, 1.92v vdimm

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DFI LANPARTY nF4 SLI-DR Venus (BIOS official 4/6/06)

 

Opteron 165 CCBBE 0615DPMW

 

2x1024MB OCZ PC4000EB (OCZ5001024EBPE-K)

 

EVGA 7900GTO, stock 91.47 drivers

 

2 x 74GB Raptor RAID 0

 

2 x 320GB Seagate 7200.10 RAID 1

 

NEC 3540A DVD+/-RW

 

OCZ GameXstream 700W

 

 

 

*

*

 

 

*

*

 

==========

 

[b]Genie BIOS Settings:[/b]
[color=red]
FSB Bus Frequency.............................  -  315
LDT/FSB Frequency Ratio.......................  -  3
CPU/FSB Frequency Ratio.......................  -  9
PCI eXpress Frequency.........................  -  100Mhz

CPU VID StartUp Value.........................  -  1.400v

CPU VID Control...............................  -  1.4
CPU VID Special Control.......................  -  104.8%
LDT Voltage Control...........................  -  1.30v 
Chip Set Voltage Control......................  -  1.60v
DRAM Voltage Control..........................  -  2.80v[/color]

[b]DRAM Configuration Settings:[/b]
[color=red]
DRAM Frequency Set............................  -  150=RAM/FSB:03/04
Command Per Clock (CPC).......................  -  Enable 
CAS Latency Control (Tcl).....................  -  3T
RAS# to CAS# delay (Trcd).....................  -  3T
Min RAS# active time (Tras)...................  -  8T
Row precharge time (Trp)......................  -  2T
Row Cycle time (Trc)..........................  -  10 Bus Clocks
Row refresh cyc time (Trfc)...................  -  16 Bus Clocks
Row to Row delay (Trrd).......................  -  03 Bus Clocks
Write recovery time (Twr).....................  -  03 Bus Clocks
Write to Read delay (Twtr)....................  -  02 Bus Clocks
Read to Write delay (Trwt)....................  -  03 Bus Clocks
Refresh Period (Tref).........................  -  3120 Cycles
DRAM Bank Interleave..........................  -  Enabled

DQS Skew Control..............................  -  Auto
DQS Skew Value................................  -  0
DRAM Drive Strength...........................  -  Level 08
DRAM Data Drive Strength......................  -  Level 2 (reduce 30%)
Max Async Latency.............................  -  8ns
DRAM Response Time............................  -  Normal
Read Preamble Time............................  -  6ns
IdleCycle Limit...............................  -  64
Dynamic Counter...............................  -  Disable
R/W Queue Bypass..............................  -  16 x
Bypass Max....................................  -  04 x
32 Byte Granularity...........................  -  Disable(4 Bursts)
[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z + Everest 2.20:

 

fullocdbwf7.th.jpg

 

 

3dMark2003:

 

3dmark03hi2.jpg

 

 

3dMark2005:

 

3dmark05gj9.jpg

 

 

 

3dMark 2006:

 

3dmark06br4.jpg

 

 

 

Aquamark 3:

 

aquamarkci5.jpg

 

 

 

==========

 

 

 

short description:

315 x 9 @ 2835Mhz, 1.400v + 104%

3-3-8-2 @ 2.80v vdimm

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DFI LANPARTY UT nF4 Ultra-D (BIOS 406)

 

AMD 3500+ (Vince E6)

 

BigTyphoon/ Evercool VC-RE

 

2x512MB GAIL ONES PC4800 TccD

 

XFX GeForce 7600GTxxx, 590/800 84.21 drivers

 

80 Gig Hitachi Sata 11 hdd

 

NEC DVD RW ND-4570A

 

600-Watt Sharkoon SilentStorm 120 Power Supply

 

 

 

 

 

 

 

 

 

 

 

==========

 

[b]Genie BIOS Settings:[/b]

[color=blue]

FSB Bus Frequency.............................  -  295

LDT/FSB Frequency Ratio.......................  -  2.5

CPU/FSB Frequency Ratio.......................  -  10x

PCI eXpress Frequency.........................  -  100Mhz



CPU VID StartUp Value.........................  -  1.475v



CPU VID Control...............................  -  1.525v

CPU VID Special Control.......................  -  113%

LDT Voltage Control...........................  -  1.5v 

Chip Set Voltage Control......................  -  1.80v

DRAM Voltage Control..........................  -  2.80v[/color]



[b]DRAM Configuration Settings:[/b]

[color=blue]

DRAM Frequency Set............................  -  200=RAM/FSB:01/01

Command Per Clock (CPC).......................  -  Enable 

CAS Latency Control (Tcl).....................  -  3

RAS# to CAS# delay (Trcd).....................  -  4

Min RAS# active time (Tras)...................  -  8

Row precharge time (Trp)......................  -  4

Row Cycle time (Trc)..........................  -  13 Bus Clocks

Row refresh cyc time (Trfc)...................  -  16 Bus Clocks

Row to Row delay (Trrd).......................  -  03 Bus Clocks

Write recovery time (Twr).....................  -  03 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  3120 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

DRAM Drive Strength...........................  -  L8

DRAM Data Drive Strength......................  -  L1

Max Async Latency.............................  -  8.0

DRAM Response Time............................  -  Normal

Read Preamble Time............................  -  5.5

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Enabled

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  07 x

32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z

 

http://img171.imageshack.us/img171/7590/desk1cc4.jpg

 

3dMark2003:

 

03295011az8.png

 

3dMark2005:

 

05295011sm7.png

 

3dMark 2006:

 

06295011fq7.png

 

AquaMark

 

aqmarkvu0.png

 

==========

 

Everest Memory read

 

memoryreadvf3.png

 

Everest Memory Write

 

memorywriteku6.png

 

Everest Memory Latency

 

memorylatencytx0.png

 

short description:

295x10 @ 2950Mhz, 1.72 cpu voltages

3-4-8-4 @ 2.80v vdimm

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DFI Infinity NF4 SLI

 

AMD 64 X2 socket939 3800+ (@2870Mhz, 287x10)

 

2x1024MB OCZ Gold XTC PC4000 DDR500 OCZ5002048ELGEGXT-K (@DDR480)

 

eVGA 7900GT KO Superclock N567-BX volt mod 1.5V Forceware 92.91 drivers, 675/1750

 

Seagate 7200.9 SATA2 2x80GB 8MB cache on RAID-0

 

Pioneer 8x DVD-RW DVR-107D

 

Creative Audigy

 

Enermax Liberty 500W ATX2.2 Power Supply

 

Windows XP SP2

 

 

*

*

*

*

 

==========

 

 

[b]Genie BIOS Settings:[/b]

[color=red]

CPU Frequency....................  -  287

Hammer Fid Control...............  -  10

HTT Frequency....................  -  x3

PCIE Clock.......................  -  100Mhz



DDR Voltage Control..............  -  2.8v

Chip Voltage Control.............  -  1.6v

CPU Voltage......................  -  1.550

[/color]



[b]DRAM Configuration Settings:[/b]

[color=red]

Mem Clock mode...................  -  Limit 

Mem Clock Index Value............  -  166 

CAS Latency Control (Tcl)........  -  3

Min RAS# active time (Tras)......  -  8

RAS# to CAS# delay (Trcd)........  -  4

Row precharge time (Trp).........  -  3

Row to Row delay (Trrd)..........  -  3

Row Cycle time (Trc).............  -  12

Row refresh cyc time (Trfc)......  -  16

Write recovery time (Twr)........  -  2

Write to Read delay (Twtr).......  -  3

Read to Write delay (Trwt).......  -  2

Refresh Period (Tref)............  -  3120

Write CAS Latency (Twcl).........  -  Auto

DDR Output Driving...............  -  Auto

DDR DQ Drive Strenth.............  -  Auto

Bottom of 32Bit[31:24]IO.........  -  B0

1T2T Memory Timing..............  -  1T

Read Preamble Value..............  -  6ns

Async Latency Value..............  -  8ns

Dynamic IdleCycle Counter........  -  256

DRAM Bank Interleave.............  -  Enable

HW Memory hole remapping........  -  disable 

MTRR Mapping mode................  -  Continuous

DRAM ECC Feature Control.........  -  disable 



[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + 2x CPU-Z:

 

1ol9.th.jpg

 

 

3dMark2003:

 

2zt9.th.jpg

 

 

3dMark2005:

 

3ou4.th.jpg

 

 

3dMark2006:

 

4jq6.th.jpg

 

 

==========

 

 

 

short description:

287x10=2870mhz 1.55vcore 2.9vdimm

3.0-4-3-8

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DFI LANPARTY nF4 SLI-DR Venus 3/29 BIOS

AMD Opteron 146 CAB2E 0546

2x1024MB G Skill PC4000HZs

Giga-Byte GeForce 6600GT, Stock 81.89 drivers

80GB Western Digital SATA hdd

Sony DL DVD-RW/RAM

AeroCool Turbine 550

 

*

*

==========

[B]Genie BIOS Settings:[/B]
[COLOR=red]
FSB Bus Frequency.............................  -  300
LDT/FSB Frequency Ratio.......................  -  3x
CPU/FSB Frequency Ratio.......................  -  10x
PCI eXpress Frequency.........................  -  101Mhz
CPU VID StartUp Value.........................  -  1.500v
CPU VID Control...............................  -  1.50v
CPU VID Special Control.......................  -  *109.6%
LDT Voltage Control...........................  -  1.20v 
Chip Set Voltage Control......................  -  1.62v
DRAM Voltage Control..........................  -  2.55v[/COLOR]
[B]DRAM Configuration Settings:[/B]
[COLOR=red]
DRAM Frequency Set............................  -  166=RAM/FSB:05/06
Command Per Clock (CPC).......................  -  Enable 
CAS Latency Control (Tcl).....................  -  3
RAS# to CAS# delay (Trcd).....................  -  4
Min RAS# active time (Tras)...................  -  8
Row precharge time (Trp)......................  -  4
Row Cycle time (Trc)..........................  -  7 Bus Clocks
Row refresh cyc time (Trfc)...................  -  Auto
Row to Row delay (Trrd).......................  -  02 Bus Clocks
Write recovery time (Twr).....................  -  02 Bus Clocks
Write to Read delay (Twtr)....................  -  02 Bus Clocks
Read to Write delay (Trwt)....................  -  03 Bus Clocks
Refresh Period (Tref).........................  -  3120 Cycles
DRAM Bank Interleave..........................  -  Enabled
DQS Skew Control..............................  -  Auto
DQS Skew Value................................  -  0
DRAM Drive Strength...........................  -  Auto
DRAM Data Drive Strength......................  -  Auto
Max Async Latency.............................  -  Auto
DRAM Response Time............................  -  Fast
Read Preamble Time............................  -  Auto
IdleCycle Limit...............................  -  256 Cycles
Dynamic Counter...............................  -  Disable
R/W Queue Bypass..............................  -  16 x
Bypass Max....................................  -  07 x
32 Byte Granularity...........................  -  Disable(4 Bursts)
[/COLOR]

 

==========

 

Prime95 + 3dMark2001SE + CPU-Z:

018hoursprime95venus1463gsb2.th.jpg

 

3dMark2003:

03venus1463gul5.th.jpg

 

3dMark2005:

05venus1463gtq2.th.jpg

 

3dMark 2006:

06venus1463gxq6.th.jpg

 

==========

 

short description:

300x10 @ 3000Mhz, 1.632 cpu voltages

3-4-4-8 @ 2.55v vdimm

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DFI LanParty nF4 Ultra-D (04/06/06 BIOS)

 

AMD Athlon 64 3000+ venice

 

2x1024MB G.Skill Extreme Series DDR500

 

(F1-4000USU2-2GBHZ)

 

Sapphire X1800XT 512MB, 709/788 Catalyst 6.5 + ATI Tray Tools 1.26.940

 

2x Seagate 320GB 7200.10s in RAID-0, WD2500KS hdd

 

BenQ DW1650 DVD±RW, LITE-ON 52327S CD-RW

 

FSP Epsilon 600W Power Supply

 

 

*

*

*

*

 

 

==========

 

[b]Genie BIOS Settings:[/b]
[color=red]
FSB Bus Frequency.............................  -  302
LDT/FSB Frequency Ratio.......................  -  3.0
CPU/FSB Frequency Ratio.......................  -  9.0
PCI eXpress Frequency.........................  -  103Mhz

CPU VID StartUp Value.........................  -  1.450v

CPU VID Control...............................  -  1.550v
CPU VID Special Control.......................  -  110%
LDT Voltage Control...........................  -  1.20v 
Chip Set Voltage Control......................  -  1.60v
DRAM Voltage Control..........................  -  2.60v[/color]

[b]DRAM Configuration Settings:[/b]
[color=red]
DRAM Frequency Set............................  -  180=RAM/FSB:09/10
Command Per Clock (CPC).......................  -  Enable
CAS Latency Control (Tcl).....................  -  3.0
RAS# to CAS# delay (Trcd).....................  -  4
Min RAS# active time (Tras)...................  -  8
Row precharge time (Trp)......................  -  4
Row Cycle time (Trc)..........................  -  10 Bus Clocks
Row refresh cyc time (Trfc)...................  -  14 Bus Clocks
Row to Row delay (Trrd).......................  -  02 Bus Clocks
Write recovery time (Twr).....................  -  02 Bus Clocks
Write to Read delay (Twtr)....................  -  02 Bus Clocks
Read to Write delay (Trwt)....................  -  03 Bus Clocks
Refresh Period (Tref).........................  -  3120 Cycles
DRAM Bank Interleave..........................  -  Enabled

DQS Skew Control..............................  -  Auto
DQS Skew Value................................  -  0
DRAM Drive Strength...........................  -  Auto
DRAM Data Drive Strength......................  -  Auto
Max Async Latency.............................  -  Auto
DRAM Response Time............................  -  Normal
Read Preamble Time............................  -  07.0 Nano Seconds
IdleCycle Limit...............................  -  256 Cycles
Dynamic Counter...............................  -  Enable
R/W Queue Bypass..............................  -  16 x
Bypass Max....................................  -  07 x
32 Byte Granularity...........................  -  Disable(4 Bursts)
[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z + Everest 2.20:

 

3DMark01EverestPrime95.jpg

 

 

3dMark2003:

 

3DMark032718MHzCat6.jpg

 

 

3dMark2005:

 

3DMark052718MHzCat6.jpg

 

 

3dMark 2006:

 

3DMark062718MHzCat6.jpg

 

 

AquaMark3

 

AquaMark32718MHz.jpg

 

 

==========

 

 

 

short description:

302x9x.9 @ 2718MHz, 1.67v (reported by CPU-Z & SmartGuardian)

3-4-4-8 @ 2.60v vdimm

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DFI LANPARTY NF4 Ultra SLI-D (04/06 BIOS)

 

AMD X2 4200+ Manchester, Thermalright XP120, Yateloom 120mm Fan

 

2x512MB KingMax Hardcore PC4000

 

MSI GeForce 7900GTO, 720/1650 91.74 drivers

 

2X200GB Seagate Barracuda 7,200.10 (8mb) SATA HDD, Raid0 6.86 legacy drivers

 

NEC 4551 DVDRW

 

OCZ GameXstream 700W Sli

 

 

 

 

==========

 

[b]Genie BIOS Settings:[/b]
[color=red]
FSB Bus Frequency.............................  -  247
LDT/FSB Frequency Ratio.......................  -  3
CPU/FSB Frequency Ratio.......................  -  11
PCI eXpress Frequency.........................  -  100Mhz

CPU VID StartUp Value.........................  -  1.500v

CPU VID Control...............................  -  1.450v
CPU VID Special Control.......................  -  Above VID * 110%
LDT Voltage Control...........................  -  1.30v 
Chip Set Voltage Control......................  -  1.50v
DRAM Voltage Control..........................  -  2.80v[/color]

[b]DRAM Configuration Settings:[/b]
[color=red]
DRAM Frequency Set............................  -  200=RAM/FSB:01/01
Command Per Clock (CPC).......................  -  Enable 
CAS Latency Control (Tcl).....................  -  2.5
RAS# to CAS# delay (Trcd).....................  -  03
Min RAS# active time (Tras)...................  -  08
Row precharge time (Trp)......................  -  03
Row Cycle time (Trc)..........................  -  12 Bus Clocks
Row refresh cyc time (Trfc)...................  -  24 Bus Clocks
Row to Row delay (Trrd).......................  -  03 Bus Clocks
Write recovery time (Twr).....................  -  03 Bus Clocks
Write to Read delay (Twtr)....................  -  02 Bus Clocks
Read to Write delay (Trwt)....................  -  03 Bus Clocks
Refresh Period (Tref).........................  -  3120 Cycles
DRAM Bank Interleave..........................  -  Enabled

DQS Skew Control..............................  -  Auto
DQS Skew Value................................  -  0
DRAM Drive Strength...........................  -  Auto
DRAM Data Drive Strength......................  -  Auto
Max Async Latency.............................  -  Auto
DRAM Response Time............................  -  Normal
Read Preamble Time............................  -  Auto
IdleCycle Limit...............................  -  256 Cycles
Dynamic Counter...............................  -  Disable
R/W Queue Bypass..............................  -  16 x
Bypass Max....................................  -  07 x
32 Byte Granularity...........................  -  Disable(4 Bursts)
[/color]

 

 

==========

 

 

2 x Prime95 + 3dMark2001SE + CPU-Z:

 

ocdbhe5.th.jpg

 

 

3dMark2003:

 

03dd1.th.jpg

 

 

3dMark2005:

 

05uw6.th.jpg

 

 

3dMark 2006:

 

06gtovw9.th.jpg

 

 

Aquamark

 

aquaslinw9.th.jpg

 

 

==========

 

 

 

short description:

247x11 @ 2720Mhz, 1.450v + 110%

2.5-3-3-8 @ 2.80v vdimm

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DFI LANPARTY nF4 SLI-DR (7/04-2BTA BIOS)

 

AMD Opteron 165 dual core CCBBE 0165EPMW

 

2x1024MB OCZ PC3200 (OCZ4002048ELDCPE-K)

 

XFX Geforce 7950GX2, 607/1600 91.31 drivers

 

2x36GB Western Digital Raptor 10,000RPM SATA hdd raid 0

 

OCZ GamerXStream 700w Power Supply

 

Swiftech APEX-H20 + DD-GX2

 

 

 

*

*

 

 

*

*

 

==========

 

[b]Genie BIOS Settings:[/b]

[color=red]

FSB Bus Frequency.............................  -  325

LDT/FSB Frequency Ratio.......................  -  3x

CPU/FSB Frequency Ratio.......................  -  9x

PCI eXpress Frequency.........................  -  101Mhz



CPU VID StartUp Value.........................  -  1.550v



CPU VID Control...............................  -  1.550

CPU VID Special Control.......................  -  Auto

LDT Voltage Control...........................  -  1.20v 

Chip Set Voltage Control......................  -  1.70v

DRAM Voltage Control..........................  -  2.80v[/color]



[b]DRAM Configuration Settings:[/b]

[color=red]

DRAM Frequency Set............................  -  150=RAM/FSB:01/01

Command Per Clock (CPC).......................  -  Enable 

CAS Latency Control (Tcl).....................  -  2.5

RAS# to CAS# delay (Trcd).....................  -  3

Min RAS# active time (Tras)...................  -  5

Row precharge time (Trp)......................  -  2

Row Cycle time (Trc)..........................  -  07 Bus Clocks

Row refresh cyc time (Trfc)...................  -  12 Bus Clocks

Row to Row delay (Trrd).......................  -  00 Bus Clock

Write recovery time (Twr).....................  -  02 Bus Clocks

Write to Read delay (Twtr)....................  -  01 Bus Clocks

Read to Write delay (Trwt)....................  -  02 Bus Clocks

Refresh Period (Tref).........................  -  3120 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Increase

DQS Skew Value................................  -  255

DRAM Drive Strength...........................  -  weak3 

DRAM Data Drive Strength......................  -  Normal3

Max Async Latency.............................  -  8.0ns

DRAM Response Time............................  -  Fastest

Read Preamble Time............................  -  3.0ns

IdleCycle Limit...............................  -  000 Cycles

Dynamic Counter...............................  -  Disabled

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  07 x

32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z + Everest 2.20:

 

OCDB-Opt165-Screen1.jpg

 

3dMark2003:

 

OCDB-Opt165-Screen2.jpg

 

3dMark2005:

 

OCDB-Opt165-Screen3.jpg

 

3dMark 2006:

 

OCDB-Opt165-Screen4.jpg

 

 

==========

 

 

 

short description:

325x9 @ 2926Mhz, 1.55v

2.5-3-2-5 @ 2.80v vdimm

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DFI LANPARTY nF4 SLI-DR (406 BIOS)

 

AMD X2 3800+ dual core LDBFE 0609 XPMW

 

2x1024MB Gskill pc3200 ZX’s

 

PowerColor X1900xtx , 675-783 6.9 drivers

 

2x 74GB Western Digital Raptor 10,000RPM SATA hdd's in RAID0

 

NEC 3550a DVD

 

Corsair HX520w Power Supply

 

DangerDen = TDX + Maze4 + BIX2 + DDC-12v + 38 tubing

 

 

 

 

*

*

*

*

 

==========

 

[b]Genie BIOS Settings:[/b]

[color=red]

FSB Bus Frequency.............................  -  270

LDT/FSB Frequency Ratio.......................  -  3

CPU/FSB Frequency Ratio.......................  -  10

PCI eXpress Frequency.........................  -  100Mhz



CPU VID StartUp Value.........................  -  Auto



CPU VID Control...............................  -  1.425

CPU VID Special Control.......................  -  Auto

LDT Voltage Control...........................  -  1.30v 

Chip Set Voltage Control......................  -  1.60v

DRAM Voltage Control..........................  -  2.70v [/color]



[b]DRAM Configuration Settings:[/b]

[color=red]

DRAM Frequency Set............................  -  166  

Command Per Clock (CPC).......................  -  Enable 

CAS Latency Control (Tcl).....................  -  2.5

RAS# to CAS# delay (Trcd).....................  -  3

Min RAS# active time (Tras)...................  -  5

Row precharge time (Trp)......................  -  2

Row Cycle time (Trc)..........................  -  7 Bus Clocks

Row refresh cyc time (Trfc)...................  -  14 Bus Clocks

Row to Row delay (Trrd).......................  -  02 Bus Clocks

Write recovery time (Twr).....................  -  02 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  3072 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

DRAM Drive Strength...........................  -  7

DRAM Data Drive Strength......................  -  Auto

Max Async Latency.............................  -  8

DRAM Response Time............................  -  fast

Read Preamble Time............................  -  5.5

IdleCycle Limit...............................  -  16 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  04 x

32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z + MBM + A64Tweaker :

 

http://img98.imageshack.us/img98/4092/3dmark01th4.jpg

 

 

3dMark2003 + CPU-Z + MBM + A64Tweaker + Everest Reads :

 

http://img99.imageshack.us/img99/4695/3dmark03wk4.jpg

 

 

3dMark2005 + CPU-Z + MBM + A64Tweaker + Everest Writes :

 

http://img90.imageshack.us/img90/221/3dmark05xk5.jpg

 

 

 

3dMark 2006 + CPU-Z + MBM + A64Tweaker + Everest Latency :

 

http://img98.imageshack.us/img98/4663/3dmark06yy6.jpg

 

 

 

==========

 

 

 

short description:

270x10 @ 2700Mhz

2.5-3-5-2 @ 225mhz 2.7v

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