Angry_Games Posted July 28, 2005 Posted July 28, 2005 DFI LANPARTY nF4 SLI-DR NF44 SLI-DR - 6/23-2 BIOS (Oskar Wu Alpha BIOS) AMD Sempron 3200+ socket 939 cpu 2x256MB Buffalo Technologies PC3700 BH-5 Sapphire Radeon X300SE 128MB PCI-E, ATI catalyst 5.6 Drivers Hitachi 80GB SATA II hdd (8MB cache) ASUS CD-S520/A5 Black IDE CD-ROM Drive OCZ PowerStream OCZ600ADJ ATX 600W Power Supply - Retail Thermalright SLK-948U bolt-thru heatsink + Enermax 92mm adjustable fan * * * * ========== Genie BIOS Settings: FSB Bus Frequency - 285 LDT/FSB Frequency Ration - X 3.0 CPU/FSB Frequency Ratio - Auto PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - 1.500v CPU VID Control - 1.275v CPU VID Special Control - Above VID * 126% LDT Voltage Control - 1.20v Chip Set Voltage Control - 1.50v DRAM Voltage Control - 3.20v DRAM Configuration Settings: DRAM Frequency Set - 166 (DRAM/FSB:5/06) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.0 RAS# to CAS# delay (Trcd) - 02 Bus Clocks Min RAS# active time (Tras) - 05 Bus Clocks Row precharge time (Trp) - 02 Bus Clocks Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - 17 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 01 Bus Clocks Read to Write delay (Trwt) - 02 Bus Clocks Refresh Period (Tref) - Auto Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Auto DRAM Data Drive Strength - Auto Max Async Latency - Auto DRAM Response Time - Fastest Read Preamble Time - Auto IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(4 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51: http://www.angrygames.com/ocdb/angry/939se...ron_285x9-1.jpg 3dMark2003: 3dMark2005: Aquamark 3d: ========== short description: 285x9 @ 2566Mhz, 1.275v + 126% 2-2-5-2 @ 3.2v vdimm Share this post Link to post Share on other sites More sharing options...
malinois1 Posted July 29, 2005 Posted July 29, 2005 DFI LANPARTY nF4 SLI-D 6/23/2005-3 BIOS AMD Athlon 64 X2 4400+ Toledo 1GHz FSB 2 x 1MB L2 Cache Socket 939 Dual Core Processor - Retail - CCBWE 0518 MPMW stepping 2x512MB OCZ EL Platinum Revision 2 eVGA 256-P2-N376-AX Geforce 6800GT 256MB 256-bit GDDR3 PCI-Express x16 Video Card , 7.7.7.6 drivers - 409/1100 2x HITACHI Deskstar 7K80 HDS728080PLA380 -0A30356 80GB 7200 RPM 8MB Cache Serial ATA II Hard Drive (RAID-0) PCP&Cooling Turbo-Cool 510 Express / SLI THERMALRIGHT XP-90 Heatsink - Retail * * * * ========== Genie BIOS Settings: FSB Bus Frequency - 237 LDT/FSB Frequency Ration - 3 CPU/FSB Frequency Ratio - 16 16 PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - StartUp CPU VID Control - 1.300v CPU VID Special Control - Avove VID * 113% LDT Voltage Control - 1.30v Chip Set Voltage Control - 1.60v DRAM Voltage Control - 2.8v DRAM Configuration Settings: DRAM Frequency Set - 200 (DRAM/FSB:1/01) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.0 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 08 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 08 Bus Clocks Row refresh cyc time (Trfc) - 16 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 03 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - 3120 Cycles Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Level 8 DRAM Data Drive Strength - Level 2 Max Async Latency - 7.0 Read Preamble Time - Auto IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(8 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51: http://i11.photobucket.com/albums/a161/mal.../OCDBX22600.jpg 3dMark2003: http://i11.photobucket.com/albums/a161/mal...4003dmark03.jpg 3dMark2005: http://i11.photobucket.com/albums/a161/mal...4003dmark05.jpg Aquamark 3d: http://i11.photobucket.com/albums/a161/mal...s1/aquamark.jpg Pcmark05: http://i11.photobucket.com/albums/a161/mal...s1/PCmark05.jpg ========== short description: 237 X 11 @ 2607 Mhz, 1.3v + 113% 2-3-8-3 @ 2.8v vdimm Share this post Link to post Share on other sites More sharing options...
Beer Moon Posted July 31, 2005 Posted July 31, 2005 DFI LanParty NF4 Ultra-D 6/23-03 BIOS Venice 3000+ LBBLE 0517GPIW Antec NEO 480 Crappy Patriot RAM 1024x1 eVGA 6800GT 256MB Zalman CNPS 7000B-Cu * * * * _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Genie BIOS Settings: FSB Bus Frequency - 285 LDT/FSB Frequency Ration - 3x CPU/FSB Frequency Ratio - x9.0 PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - 1.5 CPU VID Control - 1.325v CPU VID Special Control - 123% LDT Voltage Control - 1.30v Chip Set Voltage Control - 1.70v DRAM Voltage Control - 2.8v DRAM Configuration Settings: DRAM Frequency Set - 150 (DRAM/FSB:3/04) Command Per Clock (CPC) - Auto CAS Latency Control (Tcl) - 3.0 RAS# to CAS# delay (Trcd) - 3 Min RAS# active time (Tras) - 7 Row precharge time (Trp) - 3 Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - Auto Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - 3120 Cycles Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Auto DRAM Data Drive Strength - Auto Max Async Latency - Auto Read Preamble Time - Normal IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(4 Bursts) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ CLICK HERE for CPUZ x 2, and the Memory Bench from Everest, and Motherboard Monitor just for kicks. OH! Prime 95 14+ hours also on there. 3dMark01SE 3dMark03 3dMark05 In other words, Venice 3000+ overclocked to 2567Mhz on 1.552v (reported), running cool at 36C Idle and about 50C Load on a DFI LanParty Ultra-D and an Antec NEO 480. With horribly crappy Patriot RAM that is preventing me from going any higher. Haha. Share this post Link to post Share on other sites More sharing options...
sasquatch1313 Posted August 2, 2005 Posted August 2, 2005 DFI LANPARTY UT nF4 Ultra-D - BIOS 623.2 AMD Athlon 64 X2 4400+ Toledo Socket 939 Processor Model ADA4400CDBOX - CCBWE 0518 stepping 2x1024MB OCZ PC3200 Performance OCZ4002048PFDC-K Sapphire Radeon X850XT 256 MB 256-bit GDDR3 PCI-Express x16, Omega 2.6.53 (Cat 5.7), 520/1080 2x Hitachi Deskstar T7K250 160GB 7200 RPM SATAII Hard Drive (RAID-0) NEC ND-3540A Black IDE DVD burner Drive SeaSonic S12-600 600W 24-pin ATX power supply Swiftech Storm CPU Block, Danger Den Maze 4 GPU Block, Swiftech MCP655 Pump, Double Heatercore * * ========== Genie BIOS Settings: FSB Bus Frequency - 270 LDT/FSB Frequency Ration - Auto CPU/FSB Frequency Ratio - 10 PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - 1.500v CPU VID Control - 1.500v CPU VID Special Control - Auto LDT Voltage Control - 1.30v Chip Set Voltage Control - 1.70v DRAM Voltage Control - 2.60v DRAM Configuration Settings: DRAM Frequency Set - 166 (DRAM/FSB:5/06) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 08 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 11 Bus Clocks Row refresh cyc time (Trfc) - 17 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 01 Bus Clocks Read to Write delay (Trwt) - 02 Bus Clocks Refresh Period (Tref) - Auto Write CAS Latency (Twcl) - 01 DRAM Bank Interleave - Enabled DQS Skew Control - Increase Skew DQS Skew Value - 50 DRAM Drive Strength - Level 6 DRAM Data Drive Strength - Level 1 Max Async Latency - 7.0 ns DRAM Response Time - Normal Read Preamble Time - 4.0 ns IdleCycle Limit - 32 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(4 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.26: http://www.personal.psu.edu/~smd298/Prime9...-Z+3DMark01.jpg 3dMark2003: 3dMark2005: Aquamark 3d: Everest Read: Everest Write: Everest Latency: ========== Load Temps: CPU 39C PWMIC 47C Chipset 40C short description: 270x10 @ 2700Mhz, 1.500v 2.5-3-8-3 @ 225Mhz 2.6v vdimm Share this post Link to post Share on other sites More sharing options...
tmd5 Posted August 3, 2005 Posted August 3, 2005 DFI LANPARTY nF4 ultra-d - 5/10FIX-1 BIOS AMD Athlon 64 3000+ Venice Socket 939 Processor Model - YBBLE 0523 DPAW stepping 2x512MB OCZ EL Platinum revision 2 V1.1 TCC5 memory Leadtek 6800GT 256MB GDDR3 PCI-Express, Dual DVI-I ---> 7.7.7.2 - @415/1115 1x Western Digital WD800JB 80GB IDE 8MB 7200RPM Pioneer- DVD-ROM DVD-115 Hiper Type-R 580W blue Arctic Freezer 64 copper heatpipe heatsink/fan ====================== Genie BIOS Settings: FSB Bus Frequency - 280 LDT/FSB Frequency Ration - x3 CPU/FSB Frequency Ratio - x9 PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - 1.5v CPU VID Control - 1.3v CPU VID Special Control - Avove VID * 126% LDT Voltage Control - 1.20v Chip Set Voltage Control - 1.50v DRAM Voltage Control - 2.7v DRAM Configuration Settings: DRAM Frequency Set - 200 (DRAM/FSB:1/01) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 04 Bus Clocks Min RAS# active time (Tras) - 08 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 10 Bus Clocks Row refresh cyc time (Trfc) - 18 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 03 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trtw) - 03 Bus Clocks Refresh Period (Tref) - 4708 Cycles Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Slower DQS Skew Value - 128 DRAM Drive Strength - Level 7 DRAM Data Drive Strength - Level 3 Max Async Latency - 8ns Read Preamble Time - 7ns IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(4 Bursts) ==================== Prime95 + 3dMark2001SE + CPU-Z 1.26 + Everest 1.51: http://img343.imageshack.us/my.php?image=ocprime3d14gv.jpg 3dMark2003: 3dMark2005: Aquamark 3d: ====================== short description: 280x9 @ 2520Mhz, 1.3v + 126% 2.5-4-8-3 @ 2.7v vdimm Share this post Link to post Share on other sites More sharing options...
Angry_Games Posted August 8, 2005 Posted August 8, 2005 DFI LANPARTY nF4 SLI-DR NF44 SLI-DR - 6/23-2 BIOS (Oskar Wu Alpha BIOS) AMD Athlon64 3200+ Venice core 2x512MB Corsair 4400C2.5 (XMS512-4400C25, XMS4404v1.1) Sapphire Radeon X300SE 128MB PCI-E, ATI catalyst 5.6 Drivers Hitachi 80GB SATA II hdd (8MB cache) ASUS CD-S520/A5 Black IDE CD-ROM Drive OCZ PowerStream OCZ600ADJ ATX 600W Power Supply - Retail Thermalright SLK-948U bolt-thru heatsink + Enermax 92mm adjustable fan * * * * ========== Genie BIOS Settings: FSB Bus Frequency - 275 LDT/FSB Frequency Ration - AUTO CPU/FSB Frequency Ratio - Auto PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - 1.550v CPU VID Control - 1.325v CPU VID Special Control - Above VID * 126% LDT Voltage Control - 1.20v Chip Set Voltage Control - 1.50v DRAM Voltage Control - 2.80v DRAM Configuration Settings: DRAM Frequency Set - 200 (DRAM/FSB:1/01) Command Per Clock (CPC) - Auto CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 04 Bus Clocks Min RAS# active time (Tras) - 08 Bus Clocks Row precharge time (Trp) - 04 Bus Clocks Row Cycle time (Trc) - 09 Bus Clocks Row refresh cyc time (Trfc) - 19 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 04 Bus Clocks Refresh Period (Tref) - 2560 Cycles Write CAS Latency (Twcl) - 05 Bus Clocks DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Level 7 DRAM Data Drive Strength - Level 2 Max Async Latency - 9.0 Nano Seconds DRAM Response Time - Fast Read Preamble Time - 6.0 Nano Seconds IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 04 x 32 Byte Granularity - Disable(4 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01: http://www.angrygames.com/ocdb/angry/corsa...25-275x10-1.jpg 3dMark2003: 3dMark2005: Aquamark 3d: Everest Home Edition 2.01 - Memory Writes: Everest Home Edition 2.01 - Memory Latency: ========== short description: 275x10 @ 2750Mhz, 1.325v + 126% 2.5-4-8-4 @ 2.8v vdimm Share this post Link to post Share on other sites More sharing options...
Fight Game Posted August 11, 2005 Posted August 11, 2005 DFI LANPARTY UT nF4 SLI-DR - 6/23/2005 Official Bios AMD Athlon 64 3000+ Venice Socket 939 Processor 2x512mb OCZ EL DDR PC4000 Gold Rev 2 (Hynix DT-D5) 1x eVGA Geforce 6600GT 128MB 128-bit GDDR3 PCI-eX x16 Video Card, 77.72 drivers - 560/1200mhz 2x Maxtor 80GB 7200RPM ATA133 (8mb cache) Hard Drive's (RAID-0) Samsung CD burner / DVD Player SM-352 52x32x52 (8mb cache) Enermax 535w 24-pin (SLI ready) ATX Power Supply Viewsonic Professional Series 19" P95f+b (max res=2048x1536) Genie BIOS Settings: FSB Bus Frequency - 306 LDT/FSB Frequency Ration - x 3.0 CPU/FSB Frequency Ratio - x 9.0 PCI eXpress Frequency - 102Mhz CPU VID StartUp Value - 1.325 CPU VID Control - 1.325v CPU VID Special Control - Above VID * 123% LDT Voltage Control - 1.40v Chip Set Voltage Control - 1.80v DRAM Voltage Control - 3.20v DRAM Configuration Settings: DRAM Frequency Set - 180 (DRAM/FSB:9/10) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 04 Bus Clocks Min RAS# active time (Tras) - 08 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 08 Bus Clocks Row refresh cyc time (Trfc) - 15 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 02 Bus Clocks Refresh Period (Tref) - 3120 Cycles Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Increase DQS Skew Value - 50 DRAM Drive Strength - Level 8 DRAM Data Drive Strength - Level 1 Max Async Latency - 8ns Dram Response Time - Fast Read Preamble Time - Auto IdleCycle Limit - 128 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(8 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z: Everest: :nod: 3dMark2003: 3dMark2005: Aquamark 3d: ========== short description: 306x9 @ 2754Mhz :shake: , 1.325v + 123% 2.5-4-8-3 @ 3.2v vdimm Completely stock cooling on air, no extra fans Case is packed with 3 hdds, 2 cd roms, floppy, and messy ide cables! Share this post Link to post Share on other sites More sharing options...
OldGuy Posted August 13, 2005 Posted August 13, 2005 DFI LANPARTY UT NF3 939 AGP Ultra D - BIOS 705 AMD Athlon 64 3700+ San Diego Processor Model ADA3700DAA5BN - Stepping CABGE 0518UPAW Patriot 3200+ XBLK 512X2 (Slots 1/2 orange) ATI Radeon x850xt 256MB Omega Catalyst 2.6.53 (5.7) Hitachi Deskstar SATA II 80g 8m buffer RAID 0X2 (Channel 3/4) NEC ND-3520A DVD-RRW Enermax EG701AX-VE SFMA 600W Thermalright XP-120 HS with Silverstone 110cfm Fan * * Genie BIOS Settings: CPU Overclock in MHz = 303 Hammer Fid Control = X9 AGP Overclock in MHz = 67 LDT/FSB Frequency Ratio = 3X AMD K8 Cool and Quiet = Disable CPU VID Control = 1.525v CPU Voltage Adjusting = +0.3v Chipset Voltage Control = 1.75v Memory Voltage Control = 2.9v AGP Voltage Control = 1.8v DRAM Configuration: Memory Hole for PCI MMIO = Disable Max Memory Overclock (MHz) = Auto (200) 1T/2T Memory Timing = 2T Cas# Latency (Tcl) = 2.5 Ras# to Cas# Delay (Trcd) = 4 Min Ras# Active Time (Tras) = 7 Row Precharge time (Trp) = 3 Write Recovery Time (Twr) = 2 Ras#-to-Ras# Delay (trrd) = 4 Row Refresh Time (Trfc) = 13 Row Cycle Time (Trc) = 11 Write-to-Read Delay Twtr) = 2 Read-to-Write Delay (Trwt) = 2 Refresh Rate (Tref) = Auto Write Cas Latency (Twcl) = 1 Max Asynchronous Latency = 8ns Read Preamble = 6.0ns Dynamic Idle Cycle Limit = 256 DDR Output Driving = Weak Drive DDR DQ Drive Strength = 50% Reduction ECC Function = Disable ========== Prime95 + 3dMark2001SE + CPU-Z 1.28 + Everest 1.51: 3dMark2003: 3dMark2005: Aquamark 3: Everest Latency: Everest Write: Everest Read: Sandra Bandwidth: Super PI 1M: ========== short description: 303 X 9 = 2727 @ 1.525v +0.3 2.5-4-3-7 2T 1:1 @ 2.9v Share this post Link to post Share on other sites More sharing options...
BiBi Posted August 13, 2005 Posted August 13, 2005 DFI LANPARTY UT NF4 ULTRA-D - 623-3 BIOS AMD Athlon 64 3000+ Venice OCZ EL PC3200 2GB 2X1GB DDR400 CL2-3-2-5 184PIN PIN DUAL CHANNEL MEMORY KIT /W RAMSINK SAPPHIRE RADEON X800 XL PCI-E 256MB DDR VIDEO CARD, 5.7 Catalyst Drivers - Stock SEAGATE BARRACUDA 7200.7 160GB SATA W/ NCQ 7200RPM 8MB 8.5MS HARD DRIVE BENQ DW1640 DVD +RW 16X8X16 -RW 16X6X16 DUAL LAYER +R 8X -R 4X BLACK IDE FORTRON FSP/SPI AX500-A 500W ATX12V 2.0 24PIN BLUE STORM POWER SUPPLY Thermalright XP-90 ALUMINUM HEATPIPE COOLER + PANAFLO 92MM HIGH SPEED COOLING FAN 2850RPM 56.8CFM 35DBA 3PIN NO SENSOR * * ========== Genie BIOS Settings: FSB Bus Frequency - 273 LDT/FSB Frequency Ration - x 3.0 CPU/FSB Frequency Ratio - x 9.0 PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - 1.450v CPU VID Control - 1.300v CPU VID Special Control - Avove VID * 113% LDT Voltage Control - 1.20v Chip Set Voltage Control - 1.50v DRAM Voltage Control - 2.70v DRAM Configuration Settings: DRAM Frequency Set - 150 (DRAM/FSB:3/4) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.0 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 05 Bus Clocks Row precharge time (Trp) - 02 Bus Clocks Row Cycle time (Trc) - 13 Bus Clocks Row refresh cyc time (Trfc) - 16 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 01 Bus Clocks Read to Write delay (Trwt) - 02 Bus Clocks Refresh Period (Tref) - 0708 Cycles Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Level 8 DRAM Data Drive Strength - Level 2 Max Async Latency - Auto Read Preamble Time - Auto IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(4 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.26 + Everest 1.51: 3dMark2003: 3dMark2005: Aquamark 3d: Everest Home Edition 1.51: ========== short description: 273x9 @ 2457Mhz, 1.200v + 123% 2-3-5-2 1T 3:4 @ 2.7v Share this post Link to post Share on other sites More sharing options...
Boppo Posted August 15, 2005 Posted August 15, 2005 DFI LANPARTY nF4 Ultra-ATX AMD - 7/04/2005-BTA BIOS AMD Athlon 64 3700+ San Diego 1GHz FSB Socket 939 Processor Model ADA3700BNBOX - Retail mushkin Redline XP3500 1GB (2 x 512MB) 184-Pin DDR SDRAM DDR 433 (PC 3500) Unbuffered Dual Channel Kit System Memory Model 991438 - Retail MSI NX7800GTX-VT2D256E (Lite) Video Card - OEM, 77.72 drivers - 475/1400[/b] HITACHI Deskstar T7K250 HDT722516DLA380 (0A31637) 160GB 7200 RPM Serial ATA II Hard Drive - OEM NEC Beige IDE DVD Burner Model ND-3520A BG - OEM ENERMAX Noisetaker EG701P-VE SFMA ATX12V 600W Power Supply ThermalTake XP-90 HS&92mm fan. Genie BIOS Settings: FSB Bus Frequency - 255 LDT/FSB Frequency Ration - Auto CPU/FSB Frequency Ratio - x11 PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - StartUp CPU VID Control - 1.525v CPU VID Special Control - Avove VID * 110% LDT Voltage Control - 1.20v Chip Set Voltage Control - 1.50v DRAM Voltage Control - 3.30v DRAM Configuration Settings: DRAM Frequency Set - 200 (DRAM/FSB:1/1) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.0 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 06 Bus Clocks Row precharge time (Trp) - 02 Bus Clocks Row Cycle time (Trc) - 14 Bus Clocks Row refresh cyc time (Trfc) - 16 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 02 Bus Clocks Refresh Period (Tref) - 1168 DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Normal 4 DRAM Data Drive Strength - Level 3 Max Async Latency - 7 DRAM Response Time - Fast Read Preamble Time - 5 IdleCycle Limit - 16 Cycles Dynamic Counter - Enable R/W Queue Bypass - 8 x Bypass Max - 04 x 32 Byte Granularity - Disable(4 Bursts) Prime95 + 3dMark2001SE + CPU-Z 1.29 3DMark03 3dMark05 Aquamark Everest short description: 255x11 @ 2805Mhz, 1.525v + 110% 2-3-6-2 @ 3.3v vdimm Share this post Link to post Share on other sites More sharing options...
Angry_Games Posted August 16, 2005 Posted August 16, 2005 DFI LANPARTY nF4 SLI-DR NF4 SLI-DR - 6/23-2 BIOS (Oskar Wu Alpha BIOS) AMD Athlon64 X2 4400+ DualCore 2x1024MB OCZ PC3200 Platinum OCZ4002048ELDCPE-K Nvidia 6800GT PCI-Express , 384/1071 76.41 drivers WD Raptor 36GB 10,000RPM SATA hdd (8MB cache) ASUS CD-S520/A5 Black IDE CD-ROM Drive OCZ PowerStream OCZ600ADJ ATX 600W Power Supply - Retail Danger Den TDX Athlon64 (754/939) copper waterblock Danger Den CSP-MAG 12v pump Danger Den Black Ice Xtreme 120mm radiator Danger Den polyethylene 5.25" bay resevoir Danger Den Zerex water additive (4oz. bottle) Danger Den Tygon tubing * * * * ========== Genie BIOS Settings: FSB Bus Frequency - 240 LDT/FSB Frequency Ratio - AUTO CPU/FSB Frequency Ratio - Auto PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - 1.500v CPU VID Control - 1.200v CPU VID Special Control - Above VID * 113% LDT Voltage Control - 1.20v Chip Set Voltage Control - 1.50v DRAM Voltage Control - 2.80v DRAM Configuration Settings: DRAM Frequency Set - 166 (DRAM/FSB:5/06) Command Per Clock (CPC) - Enabled CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 08 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 13 Bus Clocks Row refresh cyc time (Trfc) - 16 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 03 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - Auto Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Auto DRAM Data Drive Strength - Level 2 Max Async Latency - Auto DRAM Response Time - Fast Read Preamble Time - Auto IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 04 x 32 Byte Granularity - Disable(4 Bursts) ========== Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01: http://www.angrygames.com/ocdb/angry/2x1gb...water_2gb-1.jpg 3dMark2003: 3dMark2005: Aquamark 3d: ========== short description: 240x11 @ 2640Mhz, 1.200v + 113% 2.5-3-8-3 @ 2.8v vdimm Share this post Link to post Share on other sites More sharing options...
THunDA Posted August 17, 2005 Posted August 17, 2005 DFI LANPARTY nF4 Ultra-D - 6/23-2 BIOS , IOSS Bios Savior RD1-PMC4 Venice 3200 ADA3200BPBOX Stepping=LBBLE 0515FPBW OCZ PC3200rev2 4x512mb = 2048mb's TCC5 Powercolor X850Xt vgpu + vdd mods , ZALMAN VF700-CU 2 Ball VGA COOLER.. Official Cat 5.7's 580-621 2x Western Digital Raptor WD360GD 36.7GB 10,000 RPM Serial ATA150 Hard Drive (RAID-0) 16k-16k Maxtor DiamondMax 10 120GB 3.5" Serial ATA150 Hard Drive Asus CRW-5224A CD-RW burner OCZ 600watt PowerStream PSU Thermalright SLK948 heatsink , VANTEC TD9238H 92mm 2 Ball Cooling Fan COOLER MASTER CM Stacker STC-T01-UW Black/ Silver Computer Case COOLER MASTER ALD-V03-UK Black Digital function panel 4x YS-TECH 120X25MM 4-PIN CASE FAN 105.0CFM 45.0DBA * * * * ========== Genie BIOS Settings: FSB Bus Frequency - 275 LDT/FSB Frequency Ration - Auto CPU/FSB Frequency Ratio - 10 PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - 1.45v CPU VID Control - 1.275v CPU VID Special Control - Avove VID * 123% LDT Voltage Control - 1.20v Chip Set Voltage Control - 1.50v DRAM Voltage Control - 2.70v DRAM Configuration Settings: DRAM Frequency Set - 180 (DRAM/FSB:9/10) Command Per Clock (CPC) - Disable CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 04 Bus Clocks Min RAS# active time (Tras) - 08 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 09 Bus Clocks Row refresh cyc time (Trfc) - 16 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 03 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - 4708 Cycles Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Level 7 DRAM Data Drive Strength - Level 1 Max Async Latency - 8 DRAM Response Time - Fast Read Preamble Time - 5.5 IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(8 Bursts) ========== Prime95 + 3dMark2001SE + 2x CPU-Z + MBM : 3dMark2003 + Everest : 3dMark2005 : Aquamark 3d: ========== short description: 275x10 @ 2750Mhz, 1.275v + 123% 4x512mb's @250mhz 2.5-4-8-3 @ 2.7v vdimm Share this post Link to post Share on other sites More sharing options...
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