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Socket 939 Overclocking Database

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DFI LANPARTY UT nF4 Ultra-D Socket 939 NVIDIA nForce4 Ultra ATX - 7/04-2bt BigToe BIOS

 

AMD Opteron 165 Denmark 1GHz FSB Socket 939 Dual Core Processor Model OSA165CDBOX

 

G.SKILL Extreme Series 2GB (2 x 1GB) 184-Pin DDR SDRAM DDR 500 (PC 4000) Unbuffered Dual Channel Kit System Memory Model F1-4000USU2-2GBHZ

 

eVGA 256-P2-N517-AX Geforce 7800GT 256MB GDDR3 PCI Express x16, 81.98 drivers

 

2x WD Caviar 250GB 7200 RPM SATA 3.0Gb/s (16Mb) in Raid 0 Array

 

OCZ PowerStream OCZ600ADJSLI ATX 600W Power Supply

 

THERMALRIGHT XP-120 Heatsink

 

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 300

LDT/FSB Frequency Ratio - x 3.0

CPU/FSB Frequency Ratio - x 9.0

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - Startup

 

CPU VID Control - 1.450v

CPU VID Special Control - Auto

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 2.70v

 

DRAM Configuration Settings:

DRAM Frequency Set - 140=RAM/FSB:07/10

Command Per Clock (CPC) - Auto

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 06 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 12 Bus Clocks

Row refresh cyc time (Trfc) - 24 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

DRAM Response Time - Normal

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 04 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

Prime95 + 3dMark2001SE (30257 3dMarks) + CPU-Z 1.31:

 

http://12.10.67.252/Oc/OC Opteron 165 300x9 2700Ghz Pass 8hr Dual Prime - 3dMark2001Se.jpg://http://12.10.67.252/Oc/OC Opteron 1...dMark2001Se.jpg

 

 

3dMark2003: (16713 3dMarks)

 

3dMark03.jpg

 

 

3dMark2005: (7757 3dMarks)

 

3dMark05.jpg

 

 

3dMark2006: (4270 3dMarks)

 

3dMark06.jpg

 

 

Aquamark 3d: (95078 Aquamark's)

 

Aquamark3.jpg

 

 

Everest Home 2.20 Memory Read: (5703 Mb/S)

 

Everest-Memory-Read.jpg

 

 

==========

 

 

 

short description:

Opteron 165 300x9 @ 2700Mhz, 1.450v

2.5-3-3-6 @ 2.7v vdimm

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Guest Ryn

DFI LANPARTY nF4 SLI-DR Expert - 12/07/05 Official Bios

 

AMD Athlon64 X2 3800+ Toledo

 

2x512MB GeIL Ultra X UTT-BH5

 

eVGA 7800GT, 470/1120 81.98 drivers

 

Creative X-Fi Xtreme Music

 

1x Seagate 80GB 7200.8 SATA w/NCQ / 1x200GB Seagate PATA & 1x200GB Seagate SATA

 

ASUS DVD-ROM

 

Pioneer A09XLA DVD/RW

 

OCZ PowerStream 520W SLI

 

 

 

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 240

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 10

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - startup

 

CPU VID Control - 1.425v

CPU VID Special Control - Auto

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.59v

DRAM Voltage Control - 3.01v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.0

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 05 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 17 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 4708 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 10

DRAM Data Drive Strength - Level 02

Max Async Latency - Auto

DRAM Response Time - Fast

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.32:

 

http://img132.imageshack.us/img132/7127/ocdb2px.jpg

 

 

3dMark2003:

 

3dmark03ocdb8aj.jpg

 

 

3dMark2005:

 

3dmark05ocdb3wb.jpg

 

 

3dMark2006:

 

http://img135.imageshack.us/img135/1451/3dmark06ocdb5zc.jpg

 

 

Everest Read: 5975MB/s

 

everestmemoryread5hq.th.jpg

 

 

Everest Write: 2242MB/s

 

everestmemorywrite4gr.th.jpg

 

 

Everest Latency: 46.4 ns

 

everestmemorylatency4kb.th.jpg

 

 

SuperPI 1M Calculation:

 

superpi1m0zg.th.jpg

 

==========

 

 

 

short description:

240x10 @ 2400Mhz, 1.425v

2-2-5-2 @ 3.01v vdimm 218MHz (09/10 Divider)

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DFI LANPARTY UT SLI-DR Expert - DFI Official 12/07/05

 

AMD Opteron 148 + San Diego

 

2 x 1GB GSkill Extreme F1-4000USU2--2GBHZ PC-4000 (OCCC)

 

eVGA 7800GT 516ax 256MB, 500/1220 81.98 drivers

 

2 x Maxtor 160GB IDE hdd (8MB cache)(RAID 0)

 

Ln-Lite CD-ROM/DVD-ROM/CD-R/CD-RW

 

Antec Neo Power - 480w -Active PFC 38A Dual +12v Rails

 

 

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 265

LDT/FSB Frequency Ratio - 3x

CPU/FSB Frequency Ratio - 11.0x

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - Startup

 

CPU VID Control - 1.325v

CPU VID Special Control - Above VID * 112.0%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.62v

DRAM Voltage Control - 2.71v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:01/01

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 04 Bus Clocks

Row Cycle time (Trc) - 15 Bus Clocks

Row refresh cyc time (Trfc) - 17 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 04 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - 7.0ns

DRAM Response Time - Fastest

Read Preamble Time - 5.5ns

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1:

 

one8vv.th.jpg

 

 

3dMark2003:

 

two3cq.th.jpg

 

 

3dMark2005:

 

three2tm.th.jpg

 

 

Aquamark 3d:

 

four7kq.th.jpg

 

Everest Home Edition 2.50:

 

five3mw.th.jpg

 

==========

 

 

 

short description:

265 @ 2915Mhz, 1.325v + 112.0%

3-4-4-8 @ 2.71v vdimm

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DFI LANPARTY SLI-DR Expert - 12/7/2005 official BIOS

 

AMD Opteron 170

 

2x BFG 7800GTX 256mb 500/1300 81.98 Drivers

 

2x1024MB G.skill PC4000 (tccd)

 

2x Maxtor 250GB sata hdd (16MB cache)

 

Plextor 716sa dvdrw/MSI XA52P cdrw/dvdrom

 

Enermax Nosietaker EG701AX-VE ATX 600W Power Supply

 

Creative X-FI Platinum soundcard

 

Danger Den TDX

2x Danger Den maze4 Acetal GPU

Black Ice Extreme II

Single Heater Core

Tygon Tubing

Swiftech MCRES-1000P reservoir + pump

 

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 280

LDT/FSB Frequency Ratio - x4

CPU/FSB Frequency Ratio - x10

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - Startup

 

CPU VID Control - 1.550v

CPU VID Special Control - Auto

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.52v

DRAM Voltage Control - 2.96v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3.0

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 07 Bus Clocks

Row precharge time (Trp) - 04 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - Auto

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

DRAM Response Time - Fast

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.32 + Everest Ultimate Edition 2006:

 

3dmark016rb.th.jpg

 

 

3dMark2003:

 

3dmark038lw.th.jpg

 

 

3dMark2005:

 

3dmark059po.th.jpg

 

 

3dmark2006:

3dmark061jp.th.jpg

 

 

Aquamark 3d:

 

am36ur.th.jpg

 

 

==========

 

 

 

short description:

280x10 @ 2800Mhz, 1.550v

3.0-4-7-4 @ 2.96v vdimm

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DFI Ultra-D - Bios 11/14/05

 

Opteron 170 0550UPMW

 

2x1024 Crucial Ballistix z503's (Orange Slots)

 

Power Color x850xt 1.66vGpu @ 630/630 w/6.2cats

 

1x 36gig Raptor

 

NEC 3550a DVD drive

 

OCZ 600w Power Stream SLI Edition

 

DangerDen = TDX + Maze4 + BIX2 + DDC-12v + 38 tubing

 

*

*

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 280

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 10

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.40v

 

CPU VID Control - 1.40v

CPU VID Special Control - 110%

LDT Voltage Control - 1.3v

Chip Set Voltage Control - 1.6v

DRAM Voltage Control - 2.6v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200 1:1

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3

RAS# to CAS# delay (Trcd) - 3 Bus Clocks

Min RAS# active time (Tras) - 8 Bus Clocks

Row precharge time (Trp) - 3 Bus Clocks

Row Cycle time (Trc) - 9 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 3 Bus Clocks

Write recovery time (Twr) - 3 Bus Clocks

Write to Read delay (Twtr) - 2 Bus Clocks

Read to Write delay (Trwt) - 3 Bus Clocks

Refresh Period (Tref) - Auto

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

DRAM Response Time - Normal

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

 

==========

 

 

2x Prime95 + 3dMark2001SE + 2xCPU-Z + MBM + a64tweaker :

 

untitledmedium3dm.jpg

 

 

3dMark2003 + Everest Reads + MBM :

 

untitled2medium1vx.jpg

 

 

3dMark2005 + Everest Writes + MBM :

 

untitled3medium8cb.jpg

 

3dMark2006 + Everest Latency + MBM :

 

untitled4medium2cu.jpg

 

==========

 

 

 

 

short description:

280x10=2800mhz

3-3-8-3-9-16 2.6vdimm

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DFI Ultra-D - Bios 11/14/05

 

Opteron 170 0550UPMW

 

2x1024 Corsair TWINX2048-4000PT UCCC(Orange Slots)

 

Power Color x850xt 1.66vGpu @ 630/630 w/6.2cats

 

1x 36gig Raptor

 

NEC 3550a DVD drive

 

OCZ 600w Power Stream SLI Edition

 

DangerDen = TDX + Maze4 + BIX2 + DDC-12v + 38 tubing

 

*

*

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 280

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 10

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.40v

 

CPU VID Control - 1.40v

CPU VID Special Control - 110%

LDT Voltage Control - 1.3v

Chip Set Voltage Control - 1.6v

DRAM Voltage Control - 2.7v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180 (9:10)

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3

RAS# to CAS# delay (Trcd) - 4 Bus Clocks

Min RAS# active time (Tras) - 8 Bus Clocks

Row precharge time (Trp) - 4 Bus Clocks

Row Cycle time (Trc) - 8 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 3 Bus Clocks

Write recovery time (Twr) - 3 Bus Clocks

Write to Read delay (Twtr) - 2 Bus Clocks

Read to Write delay (Trwt) - 3 Bus Clocks

Refresh Period (Tref) - 3120

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - 7

DRAM Data Drive Strength - 1

Max Async Latency - 8

DRAM Response Time - Normal

Read Preamble Time - 5.5

IdleCycle Limit - 256 Cycles

Dynamic Counter - disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

 

==========

 

 

2x Prime95 + 3dMark2001SE + 2xCPU-Z + MBM + a64tweaker :

 

untitledmedium8dy.jpg

 

 

3dMark2003 + Everest Writes + MBM :

 

untitled2medium8nb.jpg

 

 

3dMark2005 + Everest Latency + MBM :

 

untitled3medium5fw.jpg

 

3dMark2006 + Everest Read + MBM :

 

untitled4medium7ov.jpg

 

==========

 

 

 

 

short description:

280x10=2800mhz

3-4-8-4-8-14 2.7vdimm @ 254mhz

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DFI LANPARTY nF4 SLI-DR Expert - 12/07/05 Official Bios

 

AMD Opteron 146 CAB2E 0546FPAW

 

2x1024MB OCZ Gold PC4000 (OCZ5001024ELGE-K)

 

2xeVGA 7800GT 256MB, 493/1197 83.40 drivers

 

WD Raptor 74GB HD

 

Liteon DVD/RW Drive w/ Litescribe

 

Antec TPII-550ATX Power Supply

 

 

 

*

*

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 282

LDT/FSB Frequency Ratio - AUTO

CPU/FSB Frequency Ratio - 10

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.500v

 

CPU VID Control - 1.500v

CPU VID Special Control - Above VID * 109.6%

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.52v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 04 Bus Clocks

Row Cycle time (Trc) - 11 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 7

DRAM Data Drive Strength - Level 2

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Normal

Read Preamble Time - 6.0 Nano Seconds

IdleCycle Limit - 128 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 04 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.32 + MBM:

 

prime3dmark016yf.jpg

 

 

3dMark2003 + Everest read:

 

evread3dmark032pv.jpg

 

 

3dMark2005 + Everest write:

 

evwrite3dmark053sw.jpg

 

 

3dMark2006 + Everest latency:

 

evlat3dmark067sr.jpg

 

 

==========

 

 

 

short description:

282x10 @ 2820Mhz, 1.50v + 110%

3-4-8-4 @ 2.8v vdimm

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DFI LANPARTY nF4 SLI-D - 704-2BTA

 

Opteron 165 - CCBWE 0551 UPMW

 

2 x 1GB GSkill Extreme F1-4000USU2--2GBHZ PC-4000 (OCCC)

 

Galaxy 7800GT 256MB 465/1189 - 84.12 Drivers

 

Maxtor 80gb IDE

 

Generic CD/DVD-ROM Drive

 

Fortron Athena ATX 500W Power Supply - Retail

 

 

Generic watercooling on cpu, 1/2" tubing

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 290

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 9

PCI eXpress Frequency - 101Mhz

 

CPU VID StartUp Value - 1.425v

 

CPU VID Control - 1.450v

CPU VID Special Control - Auto

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 2.60v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:05/6

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 06 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 09 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 04 Bus Clocks

Refresh Period (Tref) - 1032 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Increase

DQS Skew Value - 255

DRAM Drive Strength - weaK 3

DRAM Data Drive Strength - Level 1

Max Async Latency - 9.0 Nano Seconds

DRAM Response Time - Normal

Read Preamble Time - 6.5 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.32 + Everest 2.01:

 

3dmark01primecpuz8uw.th.jpg

 

3dMark2003 + Everest 2.01:

 

3dmark03everest1zl.th.jpg

 

 

3dMark2005 + Everest 2.01:

 

3dmark050pe.th.jpg

 

Aquamark 3d:

 

951056vd.th.jpg

 

 

 

 

 

short description:

290x9 @ 2610Mhz, 1.45v

3-4-6-3 @ 2.6v vdimm

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DFI LANPARTY nF4 Expert SLI-DR - Stock BIOS 12/07/2005

 

AMD Opteron 175 OSA175DAA6CD CCBWE 0546XPMW 1367286K50181 (Retail-with Fan)

 

2x1GB OCZ5002048ELGEGXT-K DDR500 EL Gold Ext. XTC

 

XFX PV-T43G-UDF3 GF 6600GT 256MB GDDR3 Dual-DVI TV PCI-E, Forceware version :: 77.77

 

Maxtor 160GB SATA-I hdd (6L200M0)

 

Hitachi 160GB SATA-I hdd (HDS722516VLSA80)

 

NEC DVD-RW ND-3540A

 

OCZ PowerStream OCZ520ADJ ATX 520W Power Supply - Retail

 

Thermalright SI-120 + PanaFan 120mm H1B with sensor

 

Thermaltake Armor VA8000BWS

 

==========

 

Genie BIOS Settings:

FSB Bus Frequency - 238

LDT/FSB Frequency Ratio - x 4.0

LDT Bus Trnsfer Width - 16 16

CPU/FSB Frequency Ratio - x 11.0

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - Start Up

 

CPU VID Control - 1.525v

CPU VID Special Control - Above VID * 102.4%

LDT Voltage Control - 1.40v

Chip Set Voltage Control - 1.72v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - 233=RAM/FSB: 07/06

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3.0

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 12 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 7

DRAM Data Drive Strength - Level 2

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Normal

Read Preamble Time - 6.0 Nano Seconds

IdleCycle Limit - 128 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 04 x

32 Byte Granularity - Disable(4 Bursts)

 

ocdbpicture12jr.th.jpg

 

ocdbpicture21ke.th.jpg

 

short description:

238x11 @ 2618Mhz, 1.525v + 102.4%

3-4-8-3 @ 2.8v vdimm

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DFI LANPARTY UT nF4 SLI-DR Expert (Merlins BIOS 11/4/2006)

 

AMD OPTERON 175 (CCBWED546XPMW) 250*11=2750 (1/1) w/ CL-P0114 / SUNON KD1212PTB1-6A 120mm

 

OCZ 1 x 2 Gb Kit Dual Channel EL Gold XTC 3-4-3-8

 

EVGA 7800GTX 256MB, PCI-E

 

2 Western Digital Raptors WD740GD 74GB 10,000 RPM

 

LITE-ON LTR-24102B

PLEXTOR DVDR PX-708A

SONY DVD-ROM DDU1621

 

PC Power & Cooling 510 SLI-PFC ATX12V 510W Power Supply 90 - 264V UL/ ULC/ TUV/ CE-Retail

 

==========

 

Genie BIOS Settings:

FSB Bus Frequency - 250

LDT/FSB Frequency Ratio - 4

CPU/FSB Frequency Ratio - 11

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - STARTUP

 

CPU VID Control - 1.550v

CPU VID Special Control - Above VID * 102.4%

LDT Voltage Control - 1.40v

Chip Set Voltage Control - 1.68v

DRAM Voltage Control - 2.842

 

DRAM Configuration Settings:

 

DRAM Frequency Set - 200=RAM/FSB:1/1

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 07 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 10 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - AUTO

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Increase

DQS Skew Value - 0

DRAM Drive Strength - Level 7

DRAM Data Drive Strength - Level 2(Reduce 30%)

Max Async Latency - 8

DRAM Response Time - Fast

Read Preamble Time - 5

IdleCycle Limit - 128

Dynamic Counter - Disable

R/W Queue Bypass - 16x

Bypass Max - 7x

32 Byte Granularity - DISABLE(4 Bursts)

 

==========

 

Prime95 + 3dMark2001SE + CPU-Z(Validated):

http://joek71ny.tripod.com/images/full_results.jpg

 

3DMark2003:

http://joek71ny.tripod.com/images/3dmark03.jpg

 

3DMark2005:

http://joek71ny.tripod.com/images/3dmark05.jpg

 

3DMark2006:

http://joek71ny.tripod.com/images/3dmark06.jpg

 

EVEREST 2006:

READ : http://joek71ny.tripod.com/images/mem_read.jpg

 

WRITE : http://joek71ny.tripod.com/images/mem_write.jpg

 

LATENCY : http://joek71ny.tripod.com/images/mem_latency.jpg

 

==========

 

short description:

250*11 @ 2750Mhz, 1/1, 1.550v + 102%

2.5-4-7-3 @ 2.84vdimm

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DFI LANPARTY UT nF4 Ultra-D - 704-2 BIOS

 

AMD Opteron 165 CCBWE 0551VPMW Toledo

 

2x512mb Patroit XBLK PC3200 (tccd)

 

Sapphire Radeon X800GTO2 256mb modded into x850 PE 540/1180

 

2x Western Digital 80gig Raided (8MB cache)

 

Western Digital 160gig (8MB cache)

 

2x Nec 3520A

 

Antec TrueBlue 2.0 480W

 

==========

 

Prime95cpuZ3dmark01.jpg

 

Genie BIOS Settings:

FSB Bus Frequency - 290

LDT/FSB Frequency Ratio - 3.0

CPU/FSB Frequency Ratio - AUTO

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - Startup

 

CPU VID Control - 1.400v

CPU VID Special Control - Auto

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 04 Bus Clocks

Row Cycle time (Trc) - 09 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 4708 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 6.0 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://home.comcast.net/~pennyman3000/prim...puz3dmark01.jpg

 

Clear Memory Timings

 

http://home.comcast.net/~pennyman3000/clea...timingscpuz.jpg

 

3dMark2003:

 

http://home.comcast.net/~pennyman3000/3dmark03.jpg

 

 

3dMark2005:

 

http://home.comcast.net/~pennyman3000/3dmark05.jpg

 

 

 

==========

 

 

 

short description:

290x9 @ 2600Mhz, 1.400v

2.5-4-8-4 @ 2.8v vdimm

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DFI LANPARTY nF4 SLI-DR Expert - 12/07/05 Official BIOS

 

AMD Opteron 146

 

2x512MB OCZ Platinum Revision 2

 

eVGA 7800GT CO SE, 510/1176 82.90 drivers

 

Hitach 80GB SATA-II

 

NEC ND-3550A DVD Drive

 

Enermax 535W Power Supply

 

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 270

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 10

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - startup

 

CPU VID Control - 1.300v

CPU VID Special Control - Above VID * 109.2%

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 2.74v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:01/01

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3.0

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 08 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Level 7

DRAM Data Drive Strength - Level 2

Max Async Latency - 7.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 5.5 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 04 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.32 + Everest 2.20:

pic11xs.th.jpg

 

 

3dMark2003:

 

pic25et.th.jpg

 

 

3dMark2005:

 

pic34sj.th.jpg

 

 

3dMark2006:

 

pic46lz.th.jpg

 

 

Aquamark 3d:

 

pic53sy.th.jpg

 

 

==========

 

 

 

short description:

270x10 @ 2700Mhz, 1.300v + 109.2%

3.0-3-8-3 @ 2.74v vdimm

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