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Socket 939 Overclocking Database

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DFI LANPARTY nF4 SLI-DR (7/04-2BTA BIOS)

 

AMD X2 3800+ dual core

 

2x512MB OCZ Gold Rev2 PC4000 (OCZ5001024ELDCGER2) (Hynix-based)

 

GeForce 6800GT, 390/1050 81.89 drivers

 

Western Digital Raptor 36GB 10,000RPM SATA hdd

 

Asus 52x Quiet-Trak CD-ROM

 

Skyhawk 520w 24-pin ATX power supply

 

 

 

*

*

 

bios_hynixocz_3800_250x10-1.gif

 

bios_hynixocz_3800_250x10-2.gif

 

bios_hynixocz_3800_250x10-3.gif

 

 

*

*

 

==========

 

[b]Genie BIOS Settings:[/b]

[color=red]

FSB Bus Frequency.............................  -  250

LDT/FSB Frequency Ratio.......................  -  Auto

CPU/FSB Frequency Ratio.......................  -  Auto

PCI eXpress Frequency.........................  -  100Mhz



CPU VID StartUp Value.........................  -  1.500v



CPU VID Control...............................  -  1.350v

CPU VID Special Control.......................  -  110%

LDT Voltage Control...........................  -  1.20v 

Chip Set Voltage Control......................  -  1.50v

DRAM Voltage Control..........................  -  2.90v[/color]



[b]DRAM Configuration Settings:[/b]

[color=red]

DRAM Frequency Set............................  -  200=RAM/FSB:01/01

Command Per Clock (CPC).......................  -  Enable 

CAS Latency Control (Tcl).....................  -  2.5

RAS# to CAS# delay (Trcd).....................  -  04 Bus Clocks

Min RAS# active time (Tras)...................  -  10 Bus Clocks

Row precharge time (Trp)......................  -  04 Bus Clocks

Row Cycle time (Trc)..........................  -  12 Bus Clocks

Row refresh cyc time (Trfc)...................  -  24 Bus Clocks

Row to Row delay (Trrd).......................  -  03 Bus Clocks

Write recovery time (Twr).....................  -  03 Bus Clocks

Write to Read delay (Twtr)....................  -  02 Bus Clocks

Read to Write delay (Trwt)....................  -  03 Bus Clocks

Refresh Period (Tref).........................  -  3120 Cycles

DRAM Bank Interleave..........................  -  Enabled



DQS Skew Control..............................  -  Auto

DQS Skew Value................................  -  0

DRAM Drive Strength...........................  -  Auto

DRAM Data Drive Strength......................  -  Auto

Max Async Latency.............................  -  Auto

DRAM Response Time............................  -  Normal

Read Preamble Time............................  -  Auto

IdleCycle Limit...............................  -  256 Cycles

Dynamic Counter...............................  -  Disable

R/W Queue Bypass..............................  -  16 x

Bypass Max....................................  -  04 x

32 Byte Granularity...........................  -  Disable(4 Bursts)

[/color]

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://www.angrygames.com/ocdb/angry/nf4/h...00_250x10-1.gif

 

 

3dMark2003:

 

hynixocz_3800_250x10-2.gif

 

 

3dMark2005:

 

hynixocz_3800_250x10-3.gif

 

 

Aquamark 3d:

 

hynixocz_3800_250x10-4.gif

 

 

 

 

==========

 

 

 

short description:

200x10 @ 2500Mhz, 1.350v + 110%

2.5-4-10-4 @ 2.90v vdimm

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DFI Ultra-D - 704-2Bta

 

x2 3800 Retail - LDBHE 0538RPMW

 

2x512mb Mushkin PC3500 Lev2 BH5(Yellow Slots)

 

Power Color x850xt 1.66vGpu @ 630/630 w/5.12 Omega's

 

2x 36gig Raptors Raid0

 

ASUS IDE CD-ROM Drive

 

OCZ 600w Power Stream SLI Edition

 

DangerDen = TDX + Maze4 + BIX2 + DDC-12v + 38 tubing

 

*

*

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 289

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 9

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.50v

 

CPU VID Control - 1.55v

CPU VID Special Control - Auto

LDT Voltage Control - 1.3v

Chip Set Voltage Control - 1.6v

DRAM Voltage Control - 3.5 + .03v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180 (9:10)

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2

RAS# to CAS# delay (Trcd) - 2 Bus Clocks

Min RAS# active time (Tras) - 5 Bus Clocks

Row precharge time (Trp) - 2 Bus Clocks

Row Cycle time (Trc) - 7 Bus Clocks

Row refresh cyc time (Trfc) - 15 Bus Clocks

Row to Row delay (Trrd) - 2 Bus Clocks

Write recovery time (Twr) - 2 Bus Clocks

Write to Read delay (Twtr) - 1 Bus Clocks

Read to Write delay (Trwt) - 2 Bus Clocks

Refresh Period (Tref) - 3072

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Normal 3

DRAM Data Drive Strength - 1

Max Async Latency - 8

DRAM Response Time - Fast

Read Preamble Time - 5

IdleCycle Limit - 16 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

 

==========

 

 

2x Prime95 + 3dMark2001SE + 2xCPU-Z + MBM + a64Tweaker :

 

untitledmedium8sx.jpg

 

 

3dMark2003 + Everest :

 

untitled2medium1eh.jpg

 

 

3dMark2005 :

 

untitled38tp.jpg

 

 

 

==========

 

 

 

short description:

289x9=2601mhz

Ram @ 260mhz 2-2-5-2-7-15 3.5vdimm + .03v

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DFI LANPARTY nF4 Expert SLI-DR (12/7/05 BIOS)

 

AMD Opteron X2 165 CCBWE 0546MPMW

 

2x1024 Crucial Ballistix PC4000

 

BFG GeForce 7800GT OC, 81.95 driver 500/1250

 

2x Maxtor DiamondMax10 SATA RAID0 striped

 

Lite On SOHW-1633S

 

PC P&C 510 ASL

 

DangerDen D4 Pump / Copper TDX Waterblock (lapped)

 

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 315

LDT/FSB Frequency Ratio - 3.0

CPU/FSB Frequency Ratio - 9.0

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.500v

 

CPU VID Control - 1.525v

CPU VID Special Control - Above VID * 112%

LDT Voltage Control - 1.40v

Chip Set Voltage Control - 1.68v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3

RAS# to CAS# delay (Trcd) - 3 Bus Clocks

Min RAS# active time (Tras) - 8 Bus Clocks

Row precharge time (Trp) - 3 Bus Clocks

Row Cycle time (Trc) - 09 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - Auto

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

DRAM Response Time - Normal

Read Preamble Time - Auto

IdleCycle Limit - 016 Cycles

Dynamic Counter - Enable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

stable315x9.jpg

 

 

3dMark2003:

 

3dmark03315x9.jpg

 

 

3dMark2005:

 

3dmark05315x9.jpg

 

everest315x9.jpg

 

 

 

==========

 

 

 

short description:

315x9 @ 2835Mhz, 1.525v + 112%

3-3-8-3 @ 2.8v vdimm

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DFI LANPARTY nF4 Ultra-D - 7/04-2 BigToe BIOS

 

AMD Athlon64 3700+San Diego

 

2x512MB OCZ PC3700 Gold Revision3

 

ChainTech 7800GT 256MB (435/1100 81.85 drivers)

 

WD Raptors 2X74GB RAID0

 

LiteOn DVD-RW SOHW-1673S/LiteOn CD-RW LTR-52327S

 

OCZ PowerStream OCZ520ADJ ATX 520W Power Supply

*

*

==========

 

Genie BIOS Settings:

FSB Bus Frequency - 280

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 10

PCI eXpress Frequency - 102Mhz

 

CPU VID StartUp Value - 1.425v

 

CPU VID Control - 1.375v

CPU VID Special Control - Above VID * 113%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.70v

DRAM Voltage Control - 2.90v

 

DRAM Configuration Settings:

DRAM Frequency Set - 180=RAM/FSB:09/10

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 08 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Increase

DQS Skew Value - 50

DRAM Drive Strength - Normal4

DRAM Data Drive Strength - Level 2

Max Async Latency - 7.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 5.0 Nano Seconds

IdleCycle Limit - 016 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

==========

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest Ultimate 2006:

 

dfibenchmarks1280x101805jx.th.jpg

 

3dMark2003:

 

3dmark03280x101809wo.th.jpg

 

3dMark2005:

 

3dmark05280x101806oe.th.jpg

 

Aquamark 3d:

 

aquamark280x101803uv.th.jpg

 

==========

 

short description:

280x10 @ 2800Mhz, 1.375v + 113%

2.5-3-8-3 @ 2.90v vdimm

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DFI Ultra-D - Bios 623-3

 

Venice 3200 (0515)

 

2x512mb Centon Advance PC4400 TCCD(Orange Slots)

 

Power Color x850xt 1.66vGpu @ 630/630 w/5.12 Omega's

 

2x 36gig Raptors Raid0

 

ASUS IDE CD-ROM Drive

 

OCZ 600w Power Stream SLI Edition

 

DangerDen = TDX + Maze4 + BIX2 + DDC-12v + 38 tubing

 

*

*

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 280

LDT/FSB Frequency Ratio - 3

CPU/FSB Frequency Ratio - 10

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.475v

 

CPU VID Control - 1.475v

CPU VID Special Control - 113%

LDT Voltage Control - 1.3v

Chip Set Voltage Control - 1.6v

DRAM Voltage Control - 2.9 + .03v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200 1:1

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 4 Bus Clocks

Min RAS# active time (Tras) - 8 Bus Clocks

Row precharge time (Trp) - 4 Bus Clocks

Row Cycle time (Trc) - 9 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 3 Bus Clocks

Write recovery time (Twr) - 3 Bus Clocks

Write to Read delay (Twtr) - 2 Bus Clocks

Read to Write delay (Trwt) - 3 Bus Clocks

Refresh Period (Tref) - 4708

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - 7

DRAM Data Drive Strength - 3

Max Async Latency - 8

DRAM Response Time - Normal

Read Preamble Time - 6

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

 

==========

 

 

Prime95 + 3dMark2001SE + 2xCPU-Z + MBM :

 

http://img355.imageshack.us/img355/7070/un...edmedium1oi.jpg

 

 

3dMark2003 :

 

http://img355.imageshack.us/img355/2166/untitled23tt.jpg

 

 

3dMark2005 + Everest :

 

http://img355.imageshack.us/img355/5443/un...d3medium6bd.jpg

 

 

 

==========

 

 

 

short description:

280x10=2800mhz

Ram @ 280mhz 2.5-4-8-4-9-16

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DFI|NF4 LANPARTY UT nF4 SLI-DR - 6/23/05 BIOS

 

AMD Athlon64 3200+ Venice (e3)

 

2x1024MB OCZ PC3200 Platinum OCZ4002048ELDCPE-K

 

eVGA 7800 GT 256-P2-N518, 496/1220 used in 2nd pci-e slot @ 8x (to make room for chipset HS)

 

Samsung Spinpoint 160GB SATA (8MB cache)

 

Pioneer A06 DVD+/-RW Drive

 

Antec NeoHE430 430W (from Antec p150 case)

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 270

LDT/FSB Frequency Ratio - 3x

CPU/FSB Frequency Ratio - 10x

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.450v

 

CPU VID Control - 1.275v

CPU VID Special Control - Above VID * 123%

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - 166 (DRAM/FSB:5/06)

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 13 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - Auto

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

 

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

DRAM Response Time - Normal

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

Benchmarks done with 7800gt @ 496/1220 and at 8x

 

Prime95 (10h20m) + CPU-Z 1.30 + 3dmark01se:

 

http://s93009101.onlinehome.us/ocdbss/pic1.jpg

 

 

3dMark2003:

 

pic2.jpg

 

 

3dMark2005+Everest Home Edition:

 

pic3.jpg

 

 

==========

 

short description:

270x10 @ 2700Mhz, 1.275v + 123%

2x1024MB, 2.5-3-3-8 @ 2.8v vdimm

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DFI LP UT nF4 SLI-D BIOS 623 nForce4 6.70

 

3500+ VeniceE6

 

2x512 Corsair XMS 3200C2 (TCCX)

 

evga 7800GTX 500/1270 81.98

 

WD Raptor 36GB / 2x Hitachi T7K250 SATA II RAID-0

 

PC Power&Cooling 510 SLI

 

*

*

 

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 240

LDT/FSB Frequency Ratio - x4.0

CPU/FSB Frequency Ratio - x11.0

PCI eXpress Frequency - 101Mhz

 

CPU VID StartUp Value - 1.425v

 

CPU VID Control - 1.425v

CPU VID Special Control - Above VID * 110%

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 2.70v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:1/01

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 06 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 14 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - AUTO

DQS Skew Value - 0

DRAM Drive Strength - Level 6

DRAM Data Drive Strength - Level 3

Max Async Latency - 7.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 5.0 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z:

 

ocver216kr.th.jpg

 

 

3dMark2003:

 

3DM03.jpg

 

 

3dMark2005:

 

3DM05.jpg

 

 

Everst Home Edition:

 

everestmemread110pl.th.jpg

 

 

==========

 

 

 

short description:

240x11 @ 2640Mhz, 1.425v + 110%

2-3-6-3 @ 2.7v vdimm

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DFI LANPARTY UT nf4 SLI-DR - 7/04-2bta

 

AMD Opteron64 148 Venus CAB2E 0545

 

2x512MB Kingston HyperX PC3200 KHX3200K2/1G (BH-5)

 

XFX 7800GTX 256MB, 81.85 drivers, stock clock/mem

 

Hitachi 160GB SATA hdd (8MB cache)

 

Samsung SH-W162 DVD-DL RW

 

OCZ PowerStream OCZ520ADJSLI ATX 520W Power Supply - Retail

 

 

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 292

LDT/FSB Frequency Ratio - 3X

CPU/FSB Frequency Ratio - 10X

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - StartUp

 

CPU VID Control - 1.550v

CPU VID Special Control - Auto

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 3.20v

 

DRAM Configuration Settings:

DRAM Frequency Set - 166=RAM/FSB:5/6

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 06 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 12 Bus Clocks

Row refresh cyc time (Trfc) - 24 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3120 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

DRAM Response Time - Normal

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 04 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://www.mastersofdisaster.org/OC1.JPG

 

 

3dMark2003:

 

OC2a.JPG

 

 

3dMark2005:

 

OC3a.JPG

 

 

 

 

==========

 

 

 

short description:

292x10 @ 2920Mhz, 1.550v

2-2-6-2 @ 3.2v vdimm

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DFI LANPARTY nF4 Ultra-D - 704-2 BigToe BIOS

 

AMD Opteron 148 CABYE 0536 GPMW

 

Enermax AG701AX PSU

 

2x512MB OCZ 4800 Plat Le TCCD orange slots

 

Sapphire X800GTO2 256MB, 640/600 Omega 5.12 Drivers

 

36 gb Raptor

 

*

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 301

LDT/FSB Frequency Ratio - AUTO

CPU/FSB Frequency Ratio - 10 x

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.400v

 

CPU VID Control - 1.450v

CPU VID Special Control - Above VID * 113%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 2.70v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:1/1

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 04 Bus Clocks

Row Cycle time (Trc) - 11 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3072 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Weak 4

DRAM Data Drive Strength - Level 2

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 6.0 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.29 + Everest 2.01:

 

http://img510.imageshack.us/img510/539/11hrprime7vm.jpg

 

3dMark2003:

 

http://img510.imageshack.us/img510/3069/20037ds.jpg

 

3dMark2005:

 

http://img510.imageshack.us/img510/4008/20054gv.jpg

 

 

 

==========

 

 

 

short description:

301x10 @ 3010 Mhz, 1.450v + 113%

2.5-4-8-4 @ 2.7v vdimm

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DFI LANPARTY nF4 Ultra-D - 7/04-2 BigToe BIOS

 

AMD Opteron 148 CABYE 0543 FPMW

 

2x1024MB OCZ EB PC4000 Platinum Edition

 

Gainward 7800GTX 256MB 81.98 xtremeG 510/1400

 

Maxtor 200GB SATA hdd (8MB cache)

 

Pioneer 109Bk

 

Plextor TA 48/24/48

 

Tagan 530W U22 2Force

 

 

 

==========

 

 

Genie BIOS Settings:

Fsb Bus Frequency - 273

LDT/Fsb Frequency Ratio - 3x

CPU/Fsb Frequency Ratio - 11x

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.450

 

CPU VID Control - 1.450

CPU VID Special Control - Above VID * 104%

LDT Voltage Control - 1.4v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 2.70v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/HTT 1:1

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3

RAS# to CAS# delay (Trcd) - 03 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 02 Bus Clocks

Row Cycle time (Trc) - 08 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 03 Bus Clocks

Write recovery time (Twr) - 03 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - 3210 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - weak4

DRAM Data Drive Strength - Level 2

Max Async Latency - 8.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 6.0 Nano Seconds

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 04 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.31 + Everest(read) 2.50.480:

 

prime3dmarkevcpuz4er.th.jpg

 

 

3dMark2003:

 

3dmark037hy.th.jpg

 

 

3dMark2005:

 

3dmark059k4tz.th.jpg

 

 

Aquamark 3d:

 

148aqua1rr.th.jpg

 

 

==========

 

 

 

short description:

273x11 @ 3003Mhz, 1.450v + 104%

3-3-2-8 @ 2.7v vdimm

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DFI LANPARTY UT nF4 SLI EXPERT - 12/07/05 BIOS[/url]

 

AMD Opteron 150 Venus CABGE 0534SPMW

 

2x1024MB OCZ pc4000 EL Gold Edition (OCZ5002048ELGE-K)

 

2*eVGA 7800GT CO 256MB, 490/1140 81.98 drivers

 

Seagate ST3250823AS SATA

 

Lite-On Combo SOHC-5235 CDRW

 

OCZ PowerStream OCZ520ADJ ATX 520W Power Supply [/url]

 

 

 

==========

 

 

 

Genie BIOS Settings:

FSB Bus Frequency - 255

LDT/FSB Frequency Ratio - 4

CPU/FSB Frequency Ratio - 11

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - Auto

 

CPU VID Control - 1.325v

CPU VID Special Control - Above VID * 104%

LDT Voltage Control - 1.30v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - By DRAM SPD Value

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 3

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 08 Bus Clocks

Row precharge time (Trp) - 04 Bus Clocks

Row Cycle time (Trc) - 08 Bus Clocks

Row refresh cyc time (Trfc) - Auto

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 02 Bus Clocks

Read to Write delay (Trwt) - 03 Bus Clocks

Refresh Period (Tref) - Auto

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - Auto

DRAM Response Time - Fast

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.31 + Everest 2.20:

 

http://home.midmaine.com/~rachelm/dfiocdb2gge.jpg

 

 

3dMark2003:

 

http://home.midmaine.com/~rachelm/dfi032gge.jpg

 

 

3dMark2005:

 

http://home.midmaine.com/~rachelm/dfi052gge.jpg

 

 

 

==========

 

 

 

short description:

255x11 @ 2805Mhz, 1.325v + 104%

3-4-8-4 @ 2.8v vdimm

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Guest laydback

DFI LANPARTY nF4 Ultra-D - 704-2BTA BIOS

 

AMD Opteron146 CAB2E 0540FPMW

 

2x512MB OCZ Platinum Rev2 1.0 PC3200(TCCD)(Orange Slots)

 

BFG 7800GT OC, 500+35delta/575 XG 81.98v2

 

Maxtor 250GB ATA133

 

Western Digital 250GB SATAI

 

SBLive! 24-bit PCI

 

Enermax EG651PVE-FM 24p / 12v=36a 5v=36a 3.3v=36a

 

Zalman Reserator Plus!

 

Dual Swiftech MCP-350 Pumps

 

Thermaltake Aquabay M2 Radiator

 

Koolance CPU-300-H06 Waterblock

 

19" Viewsonic LCD - VA912b

 

17' Compaq 7020 LCD

 

 

*

*

 

==========

 

 

Genie BIOS Settings:

FSB Bus Frequency - 305

LDT/FSB Frequency Ratio - 3x

CPU/FSB Frequency Ratio - 10x

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.500v

 

CPU VID Control - 1.500v

CPU VID Special Control - Above VID * Auto

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.50v

DRAM Voltage Control - 2.80v

 

DRAM Configuration Settings:

DRAM Frequency Set - 200=RAM/FSB:01/01

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 04 Bus Clocks

Min RAS# active time (Tras) - 07 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 07 Bus Clocks

Row refresh cyc time (Trfc) - 16 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 3684 Cycles

Write CAS Latency (Twcl) - Auto

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - Auto

Max Async Latency - 9.0 Nano Seconds

DRAM Response Time - Fast

Read Preamble Time - 6.5 Nano Seconds

IdleCycle Limit - 16 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 07 x

32 Byte Granularity - Disable(4 Bursts)

 

 

==========

 

 

Prime95 + 3dMark2001SE + CPU-Z 1.31 + Everest:

 

prime2zj.th.jpg

 

3dMark2003:

 

3dmark033bd.th.jpg

 

 

3dMark2005:

 

3dmark050zn.th.jpg

 

 

Aquamark 3d:

 

am39he.th.jpg

 

==========

 

 

 

short description:

305x10 @ 3050Mhz, 1.50v + Auto

DDR610 - 2.5-4-3-7 @ 2.8v vdimm

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