Tool019840 Posted May 8, 2006 Posted May 8, 2006 For some reason, If I modify my front speed bus at all, after posting, my motherboard never shows "verifying dmi pool....", it just hangs for 5 seconds, then the system reboots. After already cutting out my UPC from my memory, I cannot return it for a couple new sticks that don't suck. Oops. Wish I found this place BEFORE I bought everything for the build. My TWINX2048 - 3200C2 gave me hell before I reflashed with 7/04-2 BigToe. Thank god for the OCDB to get me past the 3-3-3-8 timing that I had previously. Current DRAM settings are: FSB Bus: 200 (this is the problem...) LDT/FSB Freq. ratio: auto CPU/FSB Freq. ratio: 11.0 PCI Ex freq: 100mHz CPU BID startup value - Startup CPu VID control - 1.325v CPU VID Special Control - above VID * 113% LDT volt control - 1.30 v Chip Set Voltage Control - 1.60v DRAM Voltage Control - 2.70v --------------------------------------- DRAM Configuration Settings: DRAM Frequency Set - 200=RAM/FSB:01/01 Command Per Clock (CPC) - Auto CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 06 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 09 Bus Clocks Row refresh cyc time (Trfc) - 16 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 03 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - Auto Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Auto DRAM Data Drive Strength - Auto Max Async Latency - Auto DRAM Response Time - Fast Read Preamble Time - Auto IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(4 Bursts) Quote Share this post Link to post Share on other sites More sharing options...
blinker0 Posted May 8, 2006 Posted May 8, 2006 Try these values and see if they help DRAM Frequency Set - 200=RAM/FSB:01/01 Command Per Clock (CPC) - Auto CAS Latency Control (Tcl) - 2.5 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 06 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 14 Bus Clocks Row refresh cyc time (Trfc) - 16 Bus Clocks Row to Row delay (Trrd) - 03 Bus Clocks Write recovery time (Twr) - 03 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - Auto Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - 7 Or 3 depending on what selections you have.. Both are weak settings DRAM Data Drive Strength - 2 Max Async Latency - 6ns DRAM Response Time - Fast Read Preamble Time - 5ns IdleCycle Limit - 256 Cycles Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 0 5x 32 Byte Granularity - Disable(4 Bursts) __________________ Quote Share this post Link to post Share on other sites More sharing options...
Tool019840 Posted May 8, 2006 Posted May 8, 2006 Thanks, but no dice. Still will not get beyond where it should say Verifying DMI pool data. just hangs for 5 seconds, and reboots. Apparently I am destined not to overclock this rig? WHY!?!?!? Also, I got a BSOD screen in windows with those settings, previous settings were stable though. Memtest showed errors all over the board using the settings you suggested. The settings I am using are from someone else with the same memory set, but they can still overclock, in fact their FSB is 240. Why does mine suck? Quote Share this post Link to post Share on other sites More sharing options...
pgaur82 Posted May 8, 2006 Posted May 8, 2006 Have you tried it with a different PSU? That could be part of the problem maybe, worth a shot. I looked up the PSU and if I found the right one it looks like each 12V rail pulls 18A... isn't the minimun 28A for a 7800GT? I thought I saw that somewhere. Quote Share this post Link to post Share on other sites More sharing options...
Tool019840 Posted May 8, 2006 Posted May 8, 2006 My power supply is a new, dual rail, sli certified, server power supply. I can't imagine that it somehow is not sufficient to power a rig that is relatively light on power consumption..... info from site: High-end Server Level Power – Intel SSI EPS 12V & ATX 12V Compatible Support for Intel P4 (775) and AMD Athlon 64/FX (K8) platforms Support Intel Dual CPU Nocona Dual Independent 12V Rails Supply to MB/CPU and Drives Smart Cooling and Noise Control Design Power Consumption Signal Output Available for Real-Time Power Consumption Meter Monitoring Multiple Power Protections against Over Power, Short-Circuit, Over-Current, Overload & Over-temperature Efficient Connector & Cable Management High Quality Mask Black Casing Nextherm PC Air Conditioner Connector Supported Quote Share this post Link to post Share on other sites More sharing options...
Lackadaisical Posted May 8, 2006 Posted May 8, 2006 Have you tried running your memory on a divider? Quote Share this post Link to post Share on other sites More sharing options...
Tool019840 Posted May 8, 2006 Posted May 8, 2006 I don't know how. Would this be the following....? Genie BIOS Settings: FSB Bus Frequency - 270 LDT/FSB Frequency Ratio - 3 CPU/FSB Frequency Ratio - 9 PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - 1.425v CPU VID Control - 1.425v CPU VID Special Control - Above VID * 104% LDT Voltage Control - 1.40v Chip Set Voltage Control - 1.80v DRAM Voltage Control - 2.70v DRAM Configuration Settings: DRAM Frequency Set - 150 (DRAM/FSB:3/04) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.0 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 06 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - 14 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - 3120 Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Auto DRAM Data Drive Strength - Auto Max Async Latency - 8 Read Preamble Time - 6 IdleCycle Limit - 32 Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(4 Bursts) I am willing to try anything, the guy with this setup has venice, will it still work? Quote Share this post Link to post Share on other sites More sharing options...
Lackadaisical Posted May 9, 2006 Posted May 9, 2006 It sounds like you need to read the overclocking guide before going any further. I dont recomend just plugging in random settings from the overclocking database if you dont know what they do. http://www.dfi-street.com/forum/showthread.php?t=28049 Quote Share this post Link to post Share on other sites More sharing options...
Kandoo Posted May 9, 2006 Posted May 9, 2006 Yes read the guide at this point. find your max cpu and max ram. then adjust until both run at highest setting stable with good temps and volts. You may find that your ram is the bottleneck? Quote Share this post Link to post Share on other sites More sharing options...
Tool019840 Posted May 9, 2006 Posted May 9, 2006 Sound advice. So after a couple hours of processing this mess, I get it. Yes, the memory is the bottleneck. I have to keep the memory around 200mhz to get everything stable. I am using close to the numbers of the gentleman with the Venice, reducing the memory/fsb multiplier to keep the DDR400 rockin, but watching my htt to make sure it is in the 2000mhz range. Allows me 6% overclock and 2-3-3-6 @ 1t, and prime stable, memtest shows no errors. Looks like this is as good as it gets with these particular memory modules.... DON'T BUY THEM IF YOU LIKE DFI MAINBOARDS. AVOID CORSAIR TWINX2048-3200C2 LIKE THE PLAGUE. The MB rocks, and so does this forum. FINAL STABLE FIGURES: Genie BIOS Settings: FSB Bus Frequency - 260 LDT/FSB Frequency Ratio - 4 CPU/FSB Frequency Ratio - 9 PCI eXpress Frequency - 100Mhz CPU VID StartUp Value - 1.425v CPU VID Control - 1.425v CPU VID Special Control - Above VID * 104% LDT Voltage Control - 1.40v Chip Set Voltage Control - 1.80v DRAM Voltage Control - 2.70v DRAM Configuration Settings: DRAM Frequency Set - 150 (DRAM/FSB:3/04) Command Per Clock (CPC) - Enable CAS Latency Control (Tcl) - 2.0 RAS# to CAS# delay (Trcd) - 03 Bus Clocks Min RAS# active time (Tras) - 06 Bus Clocks Row precharge time (Trp) - 03 Bus Clocks Row Cycle time (Trc) - 07 Bus Clocks Row refresh cyc time (Trfc) - 14 Bus Clocks Row to Row delay (Trrd) - 02 Bus Clocks Write recovery time (Twr) - 02 Bus Clocks Write to Read delay (Twtr) - 02 Bus Clocks Read to Write delay (Trwt) - 03 Bus Clocks Refresh Period (Tref) - 3120 Write CAS Latency (Twcl) - Auto DRAM Bank Interleave - Enabled DQS Skew Control - Auto DQS Skew Value - 0 DRAM Drive Strength - Auto DRAM Data Drive Strength - Auto Max Async Latency - 8 Read Preamble Time - 6 IdleCycle Limit - 32 Dynamic Counter - Disable R/W Queue Bypass - 16 x Bypass Max - 07 x 32 Byte Granularity - Disable(4 Bursts) ========== Quote Share this post Link to post Share on other sites More sharing options...
learners permit Posted May 9, 2006 Posted May 9, 2006 That T-ref is wrong for those modules. Set it to auto and try to get some more speed outta those modules. If thats the auto setting value then try some different ones manually to see if they'll memtest any better. Quote Share this post Link to post Share on other sites More sharing options...
ramik Posted May 9, 2006 Posted May 9, 2006 I had the same problems, but after some experiments (as in the guide) i reached the results as in my sig, CPU 2000@2500, ram @ 208MHz, stable enough, the only game that makes it block is Fifa 2006, it gets more stable at 2400... Quote Share this post Link to post Share on other sites More sharing options...
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