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fscussel

What program (not A64tweaker) to read AUTO values??

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Hello, A64 tweaker doesnt show the value of DRAM DATA STRENGTH when you set it to AUTO, it will only show "weak" or "normal", and there are other options that it doesnt show. So, is there a better program to read ALL the values that you set to AUTO in the bios in windows?? also, wich program to read the SPD values of all those parameters that DFI has for memory in the bios? thanks.

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1-3-5-7 weak 2-4-6-8 normal

 

ok, I know that man.

 

But I want to READ what value the bios set when I choose auto. the REAL value, not just "weak" or "normal".

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ok sorry im otta here guess finding out what the bios set to defalt so every thing works is easyer then learning what they do

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Hello, A64 tweaker doesnt show the value of DRAM DATA STRENGTH when you set it to AUTO, it will only show "weak" or "normal", and there are other options that it doesnt show. So, is there a better program to read ALL the values that you set to AUTO in the bios in windows?? also, wich program to read the SPD values of all those parameters that DFI has for memory in the bios? thanks.

May I just ask: why do you want to absolutely see these values in some kind of software? Don't you use BIOS anyway when making changes to the settings?

 

I'm sorry if my questions seem stupid. :)

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May I just ask: why do you want to absolutely see these values in some kind of software? Don't you use BIOS anyway when making changes to the settings?

 

I'm sorry if my questions seem stupid. :)

 

when you set it to AUTO you dont know what value it will have... that's why I want to know...

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Guest mercyless
ok I have everest here, but can't find all the extensive ram values, where is it??

 

not sure on previous versions , everest 2.20 i'm going with.

 

go to motherboard > chipset > nothbridge;AMD hammer IMC.

 

all memory timings should be displayed.

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not sure on previous versions , everest 2.20 i'm going with.

 

go to motherboard > chipset > nothbridge;AMD hammer IMC.

 

all memory timings should be displayed.

 

ok that did work, but it also just say "weak", not the numerical value for drive strength :(

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http://www.benchmarkhq.ru/english.html?/thaiphoon_e.html

 

Thaiphoon can read out all the SPD data in you modules.(very detailed)

And it helps alot.

In fact you can also use it to reprogram your modules SPD data .

 

Example of my readout:

MANUFACTURING DESCRIPTION

Manufacturer's JEDEC ID Code:

PDP Systems

Module Manufacturing Location:

01h

Module Part Number:



Module Revision Code:0000h

Module Manufacturing Date:Not Implemented

Module Serial Number:00000000h



LEGITIMATE ARCHITECTURES

Fundamental Memory Type:DDR SDRAM

DIMM configuration type:Non-ECC/Parity

Number of Row Addresses:13

Number of Column Addresses:10

Number of DIMM Banks:2

Module Bank Density:256 MB

Number of Banks on SDRAM Device:4

Module Data Width:64 bits

Primary SDRAM Width:x8

Error Checking SDRAM Width:N/A

Voltage Interface Level:SSTL 2.5V

Refresh Rate/Type:7.8 us Self Refresh

DDR SDRAM DIMM Height:N/A



TIMING SPECIFICATIONS

Burst Lengths Supported:2, 4, 8

CAS# Latencies Supported (tCL):2T

CS# Latency:0T

WE# Latency (Write Delay):1T

Cycle time at Max CAS Latency:5.0 ns

SDRAM Access from Clock (tAC):0.60 ns

Minimum Clock Cycle at tCL = X - 0.5:5.0 ns

Max Data Access Time at tCL = X - 0.5 (tAC):0.60 ns

Minimum Clock Cycle at tCL = X - 1:0.0 ns

Max Data Access Time at CL = X - 1 (tAC):0.00 ns

Minimum Active to Precharge Time (tRAS):25.0 ns

Minimum RAS to CAS delay (tRCD):10.0 ns

Minimum Row Precharge Time (tRP):10.0 ns

Min Active to Active/Auto Refresh Time (tRC):55.0 ns

Min Auto Ref to Active/Auto Refresh (tRFC):65.0 ns

Min Row Active to Row Active delay (tRRD):10.0 ns

Addr and CMD Input Setup Time Before Clock:0.60 ns

Addr and CMD Input Hold Time After Clock:0.60 ns

Data Input Setup Time Before Clock:0.40 ns

Data Input Hold Time After Clock:0.40 ns

Device Max device cycle time (tCKmax):10.0 ns

Max skew between DQS and DQ signals:0.35 ns

Max Read Data Hold Skew Factor:0.50 ns

Back-to-Back Random Col Access (tCCD):1T



SPD PROTOCOL

Number of bytes written into SPD:128

Total number of bytes of SPD:256

SPD Revision:0.0

Checksum for Bytes 0-62:F4h



SUMMARY SPECIFICATION

Module Type: DDR SDRAM PC3200 (DDR400)

Module Size: 512 MB

Frequency :200MHz tCL:2,0 tRCD:2 tRP:2 tRAS:5 tRC:11 tRFC:13 tRRD:2

Frequency :200MHz tCL:1,5 tRCD:2 tRP:2 tRAS:5 tRC:11 tRFC:13 tRRD:2

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