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Memory Errors


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Ok, got my machine up and running the other night, had it stable and booting to windows. Started running memtest last night before I went to sleep. . .

 

 

Wake up, errors, everywhere. So I pulled out my 2 sticks of G.Skill and plopped in some Crucial Ballastix Tracers that was in my gfs machine, (now, these sticks were memtest stable before) started running memtest, came back, after the first pass there are errors.

 

I tried flashing the bios to the newest beta bios,. ..no difference.

 

I am running the memory in the orange slots, as putting them in the yellow slots would not allow me to run in dual channel or at 1T.

 

Since the memory was PERFECT in another board, what could be wrong? :eek2:

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The memory was left at default voltage 2.66 and I used the 24pin + EPS 8 pin and the floppy connector for the PCI-E card. I can try to put it up to 2.7.

 

Edit* timings were set to auto, as manually setting the G.Skill to factory specs via g.skill web site my computer would not boot at all. When putting in the Crucial they did run at cas 2 (like they should) Crucial sticks are 512x512

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I think the CPU is ok.

 

Use 1 stick at a time.

Use only the orange slots,

Clear the CMOS for 10mins (make sure the PC is off and PSU power cord unplugged)

 

Then see what happens.

 

 

Will do that tonight when I get home man. Would you reccomend me to set my voltage at 2.7 after the cmos clear?

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These timing work good for mewith the ballistix.

 

 

 

[FSB Bus Frequency - 260

LDT/FSB Frequency Ratio - autO

CPU/FSB Frequency Ratio - AUTO

PCI eXpress Frequency - 100Mhz

 

CPU VID StartUp Value - 1.425v

 

CPU VID Control - 1.425v

CPU VID Special Control - Above VID * 110%

LDT Voltage Control - 1.20v

Chip Set Voltage Control - 1.60v

DRAM Voltage Control - 2.70v[/color]

 

DRAM Configuration Settings:

DRAM Frequency Set - 260=RAM/FSB:1/1

Command Per Clock (CPC) - Enable

CAS Latency Control (Tcl) - 2.5

RAS# to CAS# delay (Trcd) - 02 Bus Clocks

Min RAS# active time (Tras) - 06 Bus Clocks

Row precharge time (Trp) - 03 Bus Clocks

Row Cycle time (Trc) - 09 Bus Clocks

Row refresh cyc time (Trfc) - 12 Bus Clocks

Row to Row delay (Trrd) - 02 Bus Clocks

Write recovery time (Twr) - 02 Bus Clocks

Write to Read delay (Twtr) - 01 Bus Clocks

Read to Write delay (Trwt) - 02 Bus Clocks

Refresh Period (Tref) - 2064 Cycles

Write CAS Latency (Twcl) - 01

DRAM Bank Interleave - Enabled

 

DQS Skew Control - Auto

DQS Skew Value - 0

DRAM Drive Strength - Auto

DRAM Data Drive Strength - auto

Max Async Latency - Auito

DRAM Response Time - normal

Read Preamble Time - Auto

IdleCycle Limit - 256 Cycles

Dynamic Counter - Disable

R/W Queue Bypass - 16 x

Bypass Max - 04 x

32 Byte Granularity - Disable(4 Bursts)

 

 

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