Ok update
I went with the 2x2gb ocz PC3 14400 (oczrpr18004gk) For ram
So far its stable at 3680 and cant seam to get past that
My settings as fallows
CPU Feature Page
Thermal Management Control...........Disabled
PPM (EIST) Mode...........................Disabled
Limit CPUID MaxVal.........................Disabled
CIE Function.................................Disabled
Virtualization Technology.................Disabled
Core Multi-Processing......................Enabled
Main BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown After AC Loss...................Disabled
O. C. Fail Retry Counter...................0
CLOCK VC0 Divider..........................Auto
CPU Clock Ratio..............................8.5x
CPU N/2 Ratio................................Disabled
CPU Clock.....................................433 MHz @3680MHz
Boot Up Clock................................Auto
CPU Clock Amplitude.......................800mV
CPU Clock0 Skew............................0ps
CPU Clock0 Skew............................0ps
DRAM Speed..................................400/1333
PCIE Clock....................................100MHz
PCIE Slot Config.............................1X 1X
CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
SATA Spread Spectrum.....................Disabled
Voltage Setting Page
CPU VID Control...............................1.3125V
CPU VID Special Add Limit..................Enabled
CPU VID Special Add.........................Auto
DRAM Voltage Control.......................1.894V
SB Core/CPU PLL Voltage...................1.510V
NB Core Voltage...............................1.630V
CPU VTT Voltage..............................1.325V
VCore Droop Control..........................Disabled
Clockgen Voltage Control...................3.45V
GTL+ Buffers Strength.......................Strong
Host Slew Rate................................Weak
GTL REF Voltage Control....................Disabled
CPU GTL 1/2 REF Volt........................113
CPU GTL 0/3 REF Volt........................100
North Bridge GTL REF Volt .................100
DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing..........................Fast
T2 Dispatch....................................Disabl ed
Clock Setting Fine Delay....................Listed Below
CAS Latency Time (tCL)....................7
RAS# to CAS# Delay (tRCD)...............6
RAS# Precharge (tRP).......................6
Precharge Delay (tRAS).....................24
All Precharge to Act.........................Auto
REF to ACT Delay (tRFC)...................Auto
Performance Level............................9
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency............................Auto
Write to PRE Delay (tWR)..................Auto
Rank Write to Read (tWTR)................Auto
ACT to ACT Delay (tRRD)...................Auto
Read to Write Delay (tRDWR)..............Auto
Ranks Write to Write (tWRWR)............Auto
Ranks Read to Read (tRDRD)...............Auto
Ranks Write to Read (tWRRD)..............Auto
Read CAS# Precharge (tRTP)..............Auto
ALL PRE to Refresh............................Auto
Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Enabled
Channel 1 Phase 1 Pull-In.................Enabled
Channel 1 Phase 2 Pull-In.................Enabled
Channel 1 Phase 3 Pull-In.................Enabled
Channel 1 Phase 4 Pull-In.................Enabled
Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto
Clock Setting Fine Delay Page
DRAM Clk Driving Strength...................Level 3
DRAM Data Driving Strength.................Level 8
Ch1 DLL Default Skew Model................Model 6
Ch2 DLL Default Skew Model................Model 6
Fine Delay Step Degree....................5ps
Ch1 Clock Crossing Setting................Auto
DIMM 1 Clock fine delay...................Current
DIMM 2 Clock fine delay...................Current
DIMM 1 Control fine delay.................Current
DIMM 2 Control fine delay.................Current
Ch 1 Command fine delay..................Current
Ch2 Clock Crossing Setting................Auto
DIMM 3 Clock fine delay...................Current
DIMM 4 Clock fine delay...................Current
DIMM 3 Control fine delay.................Current
DIMM 4 Control fine delay.................Current
Ch 2 Command fine delay..................Current
Ch1Ch2 CommonClock Setting............Auto
Any ideas?